út 6. 9. 2022 v 12:36 odesílatel Michal Simek <[email protected]> napsal: > > Nodes should follow generic rules where compatible and reg properties > should be listed on the top of node. That's why sync it up. > > Signed-off-by: Michal Simek <[email protected]> > --- > > arch/arm/dts/zynq-7000.dtsi | 10 +++++----- > 1 file changed, 5 insertions(+), 5 deletions(-) > > diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi > index b4aa09d149b0..11fa0ef2bfed 100644 > --- a/arch/arm/dts/zynq-7000.dtsi > +++ b/arch/arm/dts/zynq-7000.dtsi > @@ -235,13 +235,13 @@ > }; > > qspi: spi@e000d000 { > - clock-names = "ref_clk", "pclk"; > - clocks = <&clkc 10>, <&clkc 43>; > compatible = "xlnx,zynq-qspi-1.0"; > - status = "disabled"; > + reg = <0xe000d000 0x1000>; > interrupt-parent = <&intc>; > interrupts = <0 19 4>; > - reg = <0xe000d000 0x1000>; > + clocks = <&clkc 10>, <&clkc 43>; > + clock-names = "ref_clk", "pclk"; > + status = "disabled"; > #address-cells = <1>; > #size-cells = <0>; > }; > @@ -378,9 +378,9 @@ > > devcfg: devcfg@f8007000 { > compatible = "xlnx,zynq-devcfg-1.0"; > + reg = <0xf8007000 0x100>; > interrupt-parent = <&intc>; > interrupts = <0 8 4>; > - reg = <0xf8007000 0x100>; > clocks = <&clkc 12>, <&clkc 15>, <&clkc 16>, <&clkc > 17>, <&clkc 18>; > clock-names = "ref_clk", "fclk0", "fclk1", "fclk2", > "fclk3"; > syscon = <&slcr>; > -- > 2.36.1 >
Applied. M -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Xilinx Microblaze Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs
