On 12/9/22 16:47, Xavier Drudis Ferran wrote:
This clock has no users but appears in a phandle list used by
ehci-generic.c to bulk enable it. The phandle list comes from linux,
where it is needed for suspend/resume to work [1].
My tests give the same results with or without this patch, but Marek
Vasut found it weird to declare an empty clk_ops[2].
So I adapted the code from linux 6.1-rc8 so that it hopefully works
if it ever has some user. For now, without real users, it seems to
at least not give any errors.
You might want to squash 1/2 and 2/2 together, since it's one change
(add clock operations to a phy driver).
Since 1/2 works without any clock operations, who does enable these usb
clock on this SoC ? Is there any driver or platform code for that ? If
so, you can drop that platform code with this driver-side implementation
in place (which is nice).
btw I am still hoping some of the rockchip people will have a look at
this series.
