On 1/3/23 16:56, sergiu.m...@microchip.com wrote:
On 03.01.2023 17:47, Marek Vasut wrote:
On 1/3/23 16:35, Sergiu Moga wrote:
Add the OHCI and EHCI DT nodes for the sam9x60 SoC's.
Signed-off-by: Sergiu Moga <sergiu.m...@microchip.com>
---
v1 -> v2:
- use usb@
arch/arm/dts/sam9x60.dtsi | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/arch/arm/dts/sam9x60.dtsi b/arch/arm/dts/sam9x60.dtsi
index 17224ef771..4fcfb5c597 100644
--- a/arch/arm/dts/sam9x60.dtsi
+++ b/arch/arm/dts/sam9x60.dtsi
@@ -69,6 +69,24 @@
#size-cells = <1>;
ranges;
+ usb1: usb@600000 {
+ compatible = "atmel,at91rm9200-ohci", "usb-ohci";
+ reg = <0x00600000 0x100000>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc
PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 21>;
./scripts/checkpatch.pl on this patch indicates
WARNING: line length of 121 exceeds 100 columns
#93: FILE: arch/arm/dts/sam9x60.dtsi:75:
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc
PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 21>;
Please run checkpatch on all your patches.
Also, wait a few days before sending V2 , no need to send V2 immediately
while review of V1 is still ongoing.
It was my understanding that exceeding the character per line limit on
DT's is acceptable. All of our DT's are like this.
Not to my knowledge or per what is in other DTs.
Is that some exception here ?
