On Tue, 17 Jan 2023 at 15:54, Jonas Karlman <jo...@kwiboo.se> wrote: > > SPL load FIT images by reading the data aligned to block length. > Block length aligned image data is read directly to the load address. > Unaligned image data is written to an offset of the load address and > then the data is memcpy to the load address. > > This adds a small overhead of having to memcpy unaligned data, something > that normally is not an issue. > > However, TF-A may have a segment that should be loaded into SRAM, e.g. > vendor TF-A for RK3568 has a 8KiB segment that should be loaded into the > 8KiB PMU SRAM. Having the image data for such segment unaligned result > in segment being written to and memcpy from beyond the SRAM boundary, in > the end this results in invalid data in SRAM. > > Aligning the FIT and its external data to MMC block length to work > around such issue. > > Signed-off-by: Jonas Karlman <jo...@kwiboo.se> > --- > arch/arm/dts/rockchip-u-boot.dtsi | 1 + > 1 file changed, 1 insertion(+) >
Reviewed-by: Simon Glass <s...@chromium.org>