> From: Peter Yu-Chien Lin(林宇謙) <[email protected]> > Sent: Thursday, January 19, 2023 3:06 PM > To: [email protected] > Cc: Leo Yu-Chi Liang(梁育齊) <[email protected]>; Rick Jian-Zhi Chen(陳建志) > <[email protected]>; Peter Yu-Chien Lin(林宇謙) <[email protected]> > Subject: [PATCH 01/11] riscv: global_data.h: Correct the comment for PLICSW > > PLIC is used for external interrupt, while PLICSW is an Andes-specific design > for software interrupt. > > Signed-off-by: Yu Chien Peter Lin <[email protected]> > --- > arch/riscv/include/asm/global_data.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-)
It seems not relative to cache. Other than that, Reviewed-by: Rick Chen <[email protected]> > > diff --git a/arch/riscv/include/asm/global_data.h > b/arch/riscv/include/asm/global_data.h > index 6fdc86dd8b..31ba72693d 100644 > --- a/arch/riscv/include/asm/global_data.h > +++ b/arch/riscv/include/asm/global_data.h > @@ -22,7 +22,7 @@ struct arch_global_data { > void __iomem *clint; /* clint base address */ > #endif > #ifdef CONFIG_ANDES_PLICSW > - void __iomem *plicsw; /* plic base address */ > + void __iomem *plicsw; /* andes plicsw base address */ > #endif > #if CONFIG_IS_ENABLED(SMP) > struct ipi_data ipi[CONFIG_NR_CPUS]; > -- > 2.34.1
