From: Peng Fan <[email protected]>

This is NXP internal validation board, no longer support it.

Signed-off-by: Peng Fan <[email protected]>
---
 arch/arm/Kconfig                              |  22 -
 board/freescale/ls1046aqds/Kconfig            |  31 --
 board/freescale/ls1046aqds/MAINTAINERS        |  15 -
 board/freescale/ls1046aqds/Makefile           |  11 -
 board/freescale/ls1046aqds/README             |  70 ---
 board/freescale/ls1046aqds/ddr.c              | 131 -----
 board/freescale/ls1046aqds/ddr.h              |  43 --
 board/freescale/ls1046aqds/eth.c              | 431 ----------------
 board/freescale/ls1046aqds/ls1046aqds.c       | 484 ------------------
 board/freescale/ls1046aqds/ls1046aqds_pbi.cfg |  17 -
 board/freescale/ls1046aqds/ls1046aqds_qixis.h |  38 --
 .../ls1046aqds/ls1046aqds_rcw_nand.cfg        |   7 -
 .../ls1046aqds/ls1046aqds_rcw_sd_ifc.cfg      |   8 -
 .../ls1046aqds/ls1046aqds_rcw_sd_qspi.cfg     |   8 -
 configs/ls1046aqds_SECURE_BOOT_defconfig      | 108 ----
 configs/ls1046aqds_defconfig                  | 110 ----
 configs/ls1046aqds_lpuart_defconfig           | 112 ----
 configs/ls1046aqds_nand_defconfig             | 139 -----
 configs/ls1046aqds_qspi_defconfig             | 101 ----
 configs/ls1046aqds_sdcard_ifc_defconfig       | 139 -----
 configs/ls1046aqds_sdcard_qspi_defconfig      | 128 -----
 configs/ls1046aqds_tfa_SECURE_BOOT_defconfig  | 109 ----
 configs/ls1046aqds_tfa_defconfig              | 119 -----
 23 files changed, 2381 deletions(-)
 delete mode 100644 board/freescale/ls1046aqds/Kconfig
 delete mode 100644 board/freescale/ls1046aqds/MAINTAINERS
 delete mode 100644 board/freescale/ls1046aqds/Makefile
 delete mode 100644 board/freescale/ls1046aqds/README
 delete mode 100644 board/freescale/ls1046aqds/ddr.c
 delete mode 100644 board/freescale/ls1046aqds/ddr.h
 delete mode 100644 board/freescale/ls1046aqds/eth.c
 delete mode 100644 board/freescale/ls1046aqds/ls1046aqds.c
 delete mode 100644 board/freescale/ls1046aqds/ls1046aqds_pbi.cfg
 delete mode 100644 board/freescale/ls1046aqds/ls1046aqds_qixis.h
 delete mode 100644 board/freescale/ls1046aqds/ls1046aqds_rcw_nand.cfg
 delete mode 100644 board/freescale/ls1046aqds/ls1046aqds_rcw_sd_ifc.cfg
 delete mode 100644 board/freescale/ls1046aqds/ls1046aqds_rcw_sd_qspi.cfg
 delete mode 100644 configs/ls1046aqds_SECURE_BOOT_defconfig
 delete mode 100644 configs/ls1046aqds_defconfig
 delete mode 100644 configs/ls1046aqds_lpuart_defconfig
 delete mode 100644 configs/ls1046aqds_nand_defconfig
 delete mode 100644 configs/ls1046aqds_qspi_defconfig
 delete mode 100644 configs/ls1046aqds_sdcard_ifc_defconfig
 delete mode 100644 configs/ls1046aqds_sdcard_qspi_defconfig
 delete mode 100644 configs/ls1046aqds_tfa_SECURE_BOOT_defconfig
 delete mode 100644 configs/ls1046aqds_tfa_defconfig

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index adc1b9d6e30..8e75f1dd22a 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1683,27 +1683,6 @@ config TARGET_LS1043ARDB
        help
          Support for Freescale LS1043ARDB platform.
 
-config TARGET_LS1046AQDS
-       bool "Support ls1046aqds"
-       select ARCH_LS1046A
-       select ARM64
-       select ARMV8_MULTIENTRY
-       select ARCH_SUPPORT_TFABOOT
-       select BOARD_EARLY_INIT_F
-       select BOARD_LATE_INIT
-       select DM_SPI_FLASH if DM_SPI
-       select SUPPORT_SPL
-       select FSL_DDR_BIST if !SPL
-       select FSL_DDR_INTERACTIVE  if !SPL
-       select FSL_DDR_INTERACTIVE if !SPL
-       select GPIO_EXTRA_HEADER
-       imply SCSI
-       help
-         Support for Freescale LS1046AQDS platform.
-         The LS1046A Development System (QDS) is a high-performance
-         development platform that supports the QorIQ LS1046A
-         Layerscape Architecture processor.
-
 config TARGET_LS1046ARDB
        bool "Support ls1046ardb"
        select ARCH_LS1046A
@@ -2227,7 +2206,6 @@ source "board/freescale/ls1028a/Kconfig"
 source "board/freescale/ls1021atwr/Kconfig"
 source "board/freescale/ls1021atsn/Kconfig"
 source "board/freescale/ls1021aiot/Kconfig"
-source "board/freescale/ls1046aqds/Kconfig"
 source "board/freescale/ls1043ardb/Kconfig"
 source "board/freescale/ls1046ardb/Kconfig"
 source "board/freescale/ls1046afrwy/Kconfig"
diff --git a/board/freescale/ls1046aqds/Kconfig 
b/board/freescale/ls1046aqds/Kconfig
deleted file mode 100644
index adf325f4efd..00000000000
--- a/board/freescale/ls1046aqds/Kconfig
+++ /dev/null
@@ -1,31 +0,0 @@
-if TARGET_LS1046AQDS
-
-config SYS_BOARD
-       default "ls1046aqds"
-
-config SYS_VENDOR
-       default "freescale"
-
-config SYS_SOC
-       default "fsl-layerscape"
-
-config SYS_CONFIG_NAME
-       default "ls1046aqds"
-
-if FSL_LS_PPA
-config SYS_LS_PPA_FW_ADDR
-       hex "PPA Firmware Addr"
-       default 0x40400000 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT
-       default 0x60400000 if SYS_LS_PPA_FW_IN_XIP
-       default 0x400000 if SYS_LS_PPA_FW_IN_MMC || SYS_LS_PPA_FW_IN_NAND
-
-if CHAIN_OF_TRUST
-config SYS_LS_PPA_ESBC_ADDR
-       hex "PPA Firmware HDR Addr"
-       default 0x40680000 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT
-       default 0x60680000 if SYS_LS_PPA_FW_IN_XIP
-       default 0x680000 if SYS_LS_PPA_FW_IN_MMC || SYS_LS_PPA_FW_IN_NAND
-endif
-endif
-
-endif
diff --git a/board/freescale/ls1046aqds/MAINTAINERS 
b/board/freescale/ls1046aqds/MAINTAINERS
deleted file mode 100644
index 72c4253fcf5..00000000000
--- a/board/freescale/ls1046aqds/MAINTAINERS
+++ /dev/null
@@ -1,15 +0,0 @@
-LS1046AQDS BOARD
-M:     Mingkai Hu <[email protected]>
-M:     Rajesh Bhagat <[email protected]>
-S:     Maintained
-F:     board/freescale/ls1046aqds/
-F:     include/configs/ls1046aqds.h
-F:     configs/ls1046aqds_defconfig
-F:     configs/ls1046aqds_nand_defconfig
-F:     configs/ls1046aqds_sdcard_ifc_defconfig
-F:     configs/ls1046aqds_sdcard_qspi_defconfig
-F:     configs/ls1046aqds_qspi_defconfig
-F:     configs/ls1046aqds_lpuart_defconfig
-F:     configs/ls1046aqds_tfa_defconfig
-F:     configs/ls1046aqds_tfa_SECURE_BOOT_defconfig
-F:     configs/ls1046aqds_SECURE_BOOT_defconfig
diff --git a/board/freescale/ls1046aqds/Makefile 
b/board/freescale/ls1046aqds/Makefile
deleted file mode 100644
index 6267522cc26..00000000000
--- a/board/freescale/ls1046aqds/Makefile
+++ /dev/null
@@ -1,11 +0,0 @@
-#
-# Copyright 2016 Freescale Semiconductor, Inc.
-#
-# SPDX-License-Identifier:      GPL-2.0+
-#
-
-obj-y += ddr.o
-ifndef CONFIG_SPL_BUILD
-obj-y += eth.o
-endif
-obj-y += ls1046aqds.o
diff --git a/board/freescale/ls1046aqds/README 
b/board/freescale/ls1046aqds/README
deleted file mode 100644
index cb694735a46..00000000000
--- a/board/freescale/ls1046aqds/README
+++ /dev/null
@@ -1,70 +0,0 @@
-Overview
---------
-The LS1046A Development System (QDS) is a high-performance computing,
-evaluation, and development platform that supports the QorIQ LS1046A
-LayerScape Architecture processor. The LS1046AQDS provides SW development
-platform for the Freescale LS1046A processor series, with a complete
-debugging environment.
-
-LS1046A SoC Overview
---------------------
-Please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc for LS1046A
-SoC overview.
-
- LS1046AQDS board Overview
- -----------------------
- - SERDES Connections, 8 lanes supporting:
-      - PCI Express - 3.0
-      - SGMII, SGMII 2.5
-      - QSGMII
-      - SATA 3.0
-      - 10GBase-R
- - DDR Controller
-     - 8GB 64bits DDR4 SDRAM. Support rates of up to 2133MT/s
- -IFC/Local Bus
-    - One in-socket 128 MB NOR flash 16-bit data bus
-    - One 512 MB NAND flash with ECC support
-    - PromJet Port
-    - FPGA connection
- - USB 3.0
-    - Three high speed USB 3.0 ports
-    - First USB 3.0 port configured as Host with Type-A connector
-    - The other two USB 3.0 ports configured as OTG with micro-AB connector
- - SDHC port connects directly to an adapter card slot, featuring:
-    - Optional clock feedback paths, and optional high-speed voltage 
translation assistance
-    - SD slots for SD, SDHC (1x, 4x, 8x), and/or MMC
-    - eMMC memory devices
- - DSPI: Onboard support for three SPI flash memory devices
- - 4 I2C controllers
- - One SATA onboard connectors
- - UART
-   - Two 4-pin serial ports at up to 115.2 Kbit/s
-   - Two DB9 D-Type connectors supporting one Serial port each
- - ARM JTAG support
-
-Memory map from core's view
-----------------------------
-Start Address    End Address     Description           Size
-0x00_0000_0000 - 0x00_000F_FFFF  Secure Boot ROM       1MB
-0x00_0100_0000 - 0x00_0FFF_FFFF  CCSRBAR               240MB
-0x00_1000_0000 - 0x00_1000_FFFF  OCRAM0                        64KB
-0x00_1001_0000 - 0x00_1001_FFFF  OCRAM1                        64KB
-0x00_2000_0000 - 0x00_20FF_FFFF  DCSR                  16MB
-0x00_6000_0000 - 0x00_67FF_FFFF  IFC - NOR Flash       128MB
-0x00_7E80_0000 - 0x00_7E80_FFFF  IFC - NAND Flash      64KB
-0x00_7FB0_0000 - 0x00_7FB0_0FFF  IFC - FPGA            4KB
-0x00_8000_0000 - 0x00_FFFF_FFFF  DRAM1                 2GB
-0x05_0000_0000 - 0x05_07FF_FFFF  QMAN S/W Portal       128M
-0x05_0800_0000 - 0x05_0FFF_FFFF  BMAN S/W Portal       128M
-0x08_8000_0000 - 0x09_FFFF_FFFF  DRAM2                 6GB
-0x40_0000_0000 - 0x47_FFFF_FFFF  PCI Express1          32G
-0x48_0000_0000 - 0x4F_FFFF_FFFF  PCI Express2          32G
-0x50_0000_0000 - 0x57_FFFF_FFFF  PCI Express3          32G
-
-Booting Options
----------------
-a) Promjet Boot
-b) NOR boot
-c) NAND boot
-d) SD boot
-e) QSPI boot
diff --git a/board/freescale/ls1046aqds/ddr.c b/board/freescale/ls1046aqds/ddr.c
deleted file mode 100644
index 9a96de27178..00000000000
--- a/board/freescale/ls1046aqds/ddr.c
+++ /dev/null
@@ -1,131 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright 2016 Freescale Semiconductor, Inc.
- */
-
-#include <common.h>
-#include <fsl_ddr_sdram.h>
-#include <fsl_ddr_dimm_params.h>
-#ifdef CONFIG_FSL_DEEP_SLEEP
-#include <fsl_sleep.h>
-#endif
-#include <log.h>
-#include <asm/arch/clock.h>
-#include <asm/global_data.h>
-#include "ddr.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-void fsl_ddr_board_options(memctl_options_t *popts,
-                          dimm_params_t *pdimm,
-                          unsigned int ctrl_num)
-{
-       const struct board_specific_parameters *pbsp, *pbsp_highest = NULL;
-       ulong ddr_freq;
-
-       if (ctrl_num > 3) {
-               printf("Not supported controller number %d\n", ctrl_num);
-               return;
-       }
-       if (!pdimm->n_ranks)
-               return;
-
-       pbsp = udimms[0];
-
-       /* Get clk_adjust, wrlvl_start, wrlvl_ctl, according to the board ddr
-        * freqency and n_banks specified in board_specific_parameters table.
-        */
-       ddr_freq = get_ddr_freq(0) / 1000000;
-       while (pbsp->datarate_mhz_high) {
-               if (pbsp->n_ranks == pdimm->n_ranks) {
-                       if (ddr_freq <= pbsp->datarate_mhz_high) {
-                               popts->clk_adjust = pbsp->clk_adjust;
-                               popts->wrlvl_start = pbsp->wrlvl_start;
-                               popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2;
-                               popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3;
-                               goto found;
-                       }
-                       pbsp_highest = pbsp;
-               }
-               pbsp++;
-       }
-
-       if (pbsp_highest) {
-               printf("Error: board specific timing not found for %lu MT/s\n",
-                      ddr_freq);
-               printf("Trying to use the highest speed (%u) parameters\n",
-                      pbsp_highest->datarate_mhz_high);
-               popts->clk_adjust = pbsp_highest->clk_adjust;
-               popts->wrlvl_start = pbsp_highest->wrlvl_start;
-               popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2;
-               popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3;
-       } else {
-               panic("DIMM is not supported by this board");
-       }
-found:
-       debug("Found timing match: n_ranks %d, data rate %d, rank_gb %d\n",
-             pbsp->n_ranks, pbsp->datarate_mhz_high, pbsp->rank_gb);
-
-       popts->data_bus_width = 0;      /* 64b data bus */
-       popts->otf_burst_chop_en = 0;
-       popts->burst_length = DDR_BL8;
-       popts->bstopre = 0;             /* enable auto precharge */
-
-       popts->half_strength_driver_enable = 0;
-       /*
-        * Write leveling override
-        */
-       popts->wrlvl_override = 1;
-       popts->wrlvl_sample = 0xf;
-
-       /*
-        * Rtt and Rtt_WR override
-        */
-       popts->rtt_override = 0;
-
-       /* Enable ZQ calibration */
-       popts->zq_en = 1;
-
-       popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_80ohm);
-       popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_80ohm) |
-                         DDR_CDR2_VREF_TRAIN_EN | DDR_CDR2_VREF_RANGE_2;
-
-       /* optimize cpo for erratum A-009942 */
-       popts->cpo_sample = 0x70;
-}
-
-#ifdef CONFIG_TFABOOT
-int fsl_initdram(void)
-{
-       gd->ram_size = tfa_get_dram_size();
-       if (!gd->ram_size)
-               gd->ram_size = fsl_ddr_sdram_size();
-
-       return 0;
-}
-#else
-int fsl_initdram(void)
-{
-       phys_size_t dram_size;
-
-#if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD)
-       gd->ram_size = fsl_ddr_sdram_size();
-
-       return 0;
-#else
-       puts("Initializing DDR....using SPD\n");
-
-       dram_size = fsl_ddr_sdram();
-#endif
-
-#ifdef CONFIG_FSL_DEEP_SLEEP
-       fsl_dp_ddr_restore();
-#endif
-
-       erratum_a008850_post();
-
-       gd->ram_size = dram_size;
-
-       return 0;
-}
-#endif
diff --git a/board/freescale/ls1046aqds/ddr.h b/board/freescale/ls1046aqds/ddr.h
deleted file mode 100644
index e55446f2b29..00000000000
--- a/board/freescale/ls1046aqds/ddr.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright 2016 Freescale Semiconductor, Inc.
- */
-
-#ifndef __DDR_H__
-#define __DDR_H__
-
-void erratum_a008850_post(void);
-
-struct board_specific_parameters {
-       u32 n_ranks;
-       u32 datarate_mhz_high;
-       u32 rank_gb;
-       u32 clk_adjust;
-       u32 wrlvl_start;
-       u32 wrlvl_ctl_2;
-       u32 wrlvl_ctl_3;
-};
-
-/*
- * These tables contain all valid speeds we want to override with board
- * specific parameters. datarate_mhz_high values need to be in ascending order
- * for each n_ranks group.
- */
-static const struct board_specific_parameters udimm0[] = {
-       /*
-        * memory controller 0
-        *   num|  hi| rank|  clk| wrlvl |   wrlvl   |  wrlvl |
-        * ranks| mhz| GB  |adjst| start |   ctl2    |  ctl3  |
-        */
-       {2,  1350, 0, 8,     6, 0x0708090B, 0x0C0D0E09,},
-       {2,  1666, 0, 8,     7, 0x08090A0C, 0x0D0F100B,},
-       {2,  1900, 0, 8,     7, 0x09090B0D, 0x0E10120B,},
-       {2,  2300, 0, 8,     9, 0x0A0C0D11, 0x1214150E,},
-       {}
-};
-
-static const struct board_specific_parameters *udimms[] = {
-       udimm0,
-};
-
-#endif
diff --git a/board/freescale/ls1046aqds/eth.c b/board/freescale/ls1046aqds/eth.c
deleted file mode 100644
index bbf8b8c2bee..00000000000
--- a/board/freescale/ls1046aqds/eth.c
+++ /dev/null
@@ -1,431 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright 2016 Freescale Semiconductor, Inc.
- * Copyright 2018-2020 NXP
- */
-
-#include <common.h>
-#include <log.h>
-#include <net.h>
-#include <asm/io.h>
-#include <netdev.h>
-#include <fdt_support.h>
-#include <fm_eth.h>
-#include <fsl_mdio.h>
-#include <fsl_dtsec.h>
-#include <malloc.h>
-#include <asm/arch/fsl_serdes.h>
-
-#include "../common/qixis.h"
-#include "../common/fman.h"
-#include "ls1046aqds_qixis.h"
-
-#define EMI_NONE       0xFF
-#define EMI1_RGMII1    0
-#define EMI1_RGMII2    1
-#define EMI1_SLOT1     2
-#define EMI1_SLOT2     3
-#define EMI1_SLOT4     4
-
-static const char * const mdio_names[] = {
-       "LS1046AQDS_MDIO_RGMII1",
-       "LS1046AQDS_MDIO_RGMII2",
-       "LS1046AQDS_MDIO_SLOT1",
-       "LS1046AQDS_MDIO_SLOT2",
-       "LS1046AQDS_MDIO_SLOT4",
-       "NULL",
-};
-
-/* Map SerDes 1 & 2 lanes to default slot. */
-#ifdef CONFIG_FMAN_ENET
-static int mdio_mux[NUM_FM_PORTS];
-
-static u8 lane_to_slot[] = {1, 1, 1, 1, 0, 4, 0 , 0};
-#endif
-
-static const char *ls1046aqds_mdio_name_for_muxval(u8 muxval)
-{
-       return mdio_names[muxval];
-}
-
-struct mii_dev *mii_dev_for_muxval(u8 muxval)
-{
-       struct mii_dev *bus;
-       const char *name;
-
-       if (muxval > EMI1_SLOT4)
-               return NULL;
-
-       name = ls1046aqds_mdio_name_for_muxval(muxval);
-
-       if (!name) {
-               printf("No bus for muxval %x\n", muxval);
-               return NULL;
-       }
-
-       bus = miiphy_get_dev_by_name(name);
-
-       if (!bus) {
-               printf("No bus by name %s\n", name);
-               return NULL;
-       }
-
-       return bus;
-}
-
-#ifdef CONFIG_FMAN_ENET
-struct ls1046aqds_mdio {
-       u8 muxval;
-       struct mii_dev *realbus;
-};
-
-static void ls1046aqds_mux_mdio(u8 muxval)
-{
-       u8 brdcfg4;
-
-       if (muxval < 7) {
-               brdcfg4 = QIXIS_READ(brdcfg[4]);
-               brdcfg4 &= ~BRDCFG4_EMISEL_MASK;
-               brdcfg4 |= (muxval << BRDCFG4_EMISEL_SHIFT);
-               QIXIS_WRITE(brdcfg[4], brdcfg4);
-       }
-}
-
-static int ls1046aqds_mdio_read(struct mii_dev *bus, int addr, int devad,
-                             int regnum)
-{
-       struct ls1046aqds_mdio *priv = bus->priv;
-
-       ls1046aqds_mux_mdio(priv->muxval);
-
-       return priv->realbus->read(priv->realbus, addr, devad, regnum);
-}
-
-static int ls1046aqds_mdio_write(struct mii_dev *bus, int addr, int devad,
-                              int regnum, u16 value)
-{
-       struct ls1046aqds_mdio *priv = bus->priv;
-
-       ls1046aqds_mux_mdio(priv->muxval);
-
-       return priv->realbus->write(priv->realbus, addr, devad,
-                                   regnum, value);
-}
-
-static int ls1046aqds_mdio_reset(struct mii_dev *bus)
-{
-       struct ls1046aqds_mdio *priv = bus->priv;
-
-       return priv->realbus->reset(priv->realbus);
-}
-
-static int ls1046aqds_mdio_init(char *realbusname, u8 muxval)
-{
-       struct ls1046aqds_mdio *pmdio;
-       struct mii_dev *bus = mdio_alloc();
-
-       if (!bus) {
-               printf("Failed to allocate ls1046aqds MDIO bus\n");
-               return -1;
-       }
-
-       pmdio = malloc(sizeof(*pmdio));
-       if (!pmdio) {
-               printf("Failed to allocate ls1046aqds private data\n");
-               free(bus);
-               return -1;
-       }
-
-       bus->read = ls1046aqds_mdio_read;
-       bus->write = ls1046aqds_mdio_write;
-       bus->reset = ls1046aqds_mdio_reset;
-       sprintf(bus->name, ls1046aqds_mdio_name_for_muxval(muxval));
-
-       pmdio->realbus = miiphy_get_dev_by_name(realbusname);
-
-       if (!pmdio->realbus) {
-               printf("No bus with name %s\n", realbusname);
-               free(bus);
-               free(pmdio);
-               return -1;
-       }
-
-       pmdio->muxval = muxval;
-       bus->priv = pmdio;
-       return mdio_register(bus);
-}
-
-void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr,
-                             enum fm_port port, int offset)
-{
-       struct fixed_link f_link;
-       const char *phyconn;
-
-       if (fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_SGMII) {
-               switch (port) {
-               case FM1_DTSEC9:
-                       fdt_set_phy_handle(fdt, compat, addr, "sgmii-s1-p1");
-                       break;
-               case FM1_DTSEC10:
-                       fdt_set_phy_handle(fdt, compat, addr, "sgmii-s1-p2");
-                       break;
-               case FM1_DTSEC5:
-                       fdt_set_phy_handle(fdt, compat, addr, "sgmii-s1-p3");
-                       break;
-               case FM1_DTSEC6:
-                       fdt_set_phy_handle(fdt, compat, addr, "sgmii-s1-p4");
-                       break;
-               case FM1_DTSEC2:
-                       fdt_set_phy_handle(fdt, compat, addr, "sgmii-s4-p1");
-                       break;
-               default:
-                       break;
-               }
-       } else if (fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_2500BASEX) {
-               /* 2.5G SGMII interface */
-               f_link.phy_id = cpu_to_fdt32(port);
-               f_link.duplex = cpu_to_fdt32(1);
-               f_link.link_speed = cpu_to_fdt32(1000);
-               f_link.pause = 0;
-               f_link.asym_pause = 0;
-               /* no PHY for 2.5G SGMII on QDS */
-               fdt_delprop(fdt, offset, "phy-handle");
-               fdt_setprop(fdt, offset, "fixed-link", &f_link, sizeof(f_link));
-               fdt_setprop_string(fdt, offset, "phy-connection-type",
-                                  "2500base-x");
-       } else if (fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_QSGMII) {
-               switch (port) {
-               case FM1_DTSEC1:
-                       fdt_set_phy_handle(fdt, compat, addr, "qsgmii-s2-p4");
-                       break;
-               case FM1_DTSEC5:
-                       fdt_set_phy_handle(fdt, compat, addr, "qsgmii-s2-p2");
-                       break;
-               case FM1_DTSEC6:
-                       fdt_set_phy_handle(fdt, compat, addr, "qsgmii-s2-p1");
-                       break;
-               case FM1_DTSEC10:
-                       fdt_set_phy_handle(fdt, compat, addr, "qsgmii-s2-p3");
-                       break;
-               default:
-                       break;
-               }
-               fdt_delprop(fdt, offset, "phy-connection-type");
-               fdt_setprop_string(fdt, offset, "phy-connection-type",
-                                  "qsgmii");
-       } else if (fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_XGMII &&
-                  (port == FM1_10GEC1 || port == FM1_10GEC2)) {
-               phyconn = fdt_getprop(fdt, offset, "phy-connection-type", NULL);
-               if (is_backplane_mode(phyconn)) {
-                       /* Backplane KR mode: skip fixups */
-                       printf("Interface %d in backplane KR mode\n", port);
-               } else {
-                       /* 10GBase-R interface */
-                       f_link.phy_id = cpu_to_fdt32(port);
-                       f_link.duplex = cpu_to_fdt32(1);
-                       f_link.link_speed = cpu_to_fdt32(10000);
-                       f_link.pause = 0;
-                       f_link.asym_pause = 0;
-                       /* no PHY for 10GBase-R */
-                       fdt_delprop(fdt, offset, "phy-handle");
-                       fdt_setprop(fdt, offset, "fixed-link", &f_link,
-                                   sizeof(f_link));
-                       fdt_setprop_string(fdt, offset, "phy-connection-type",
-                                          "xgmii");
-               }
-       }
-}
-
-void fdt_fixup_board_enet(void *fdt)
-{
-       int i;
-
-       for (i = FM1_DTSEC1; i < NUM_FM_PORTS; i++) {
-               switch (fm_info_get_enet_if(i)) {
-               case PHY_INTERFACE_MODE_SGMII:
-               case PHY_INTERFACE_MODE_QSGMII:
-                       switch (mdio_mux[i]) {
-                       case EMI1_SLOT1:
-                               fdt_status_okay_by_alias(fdt, "emi1-slot1");
-                               break;
-                       case EMI1_SLOT2:
-                               fdt_status_okay_by_alias(fdt, "emi1-slot2");
-                               break;
-                       case EMI1_SLOT4:
-                               fdt_status_okay_by_alias(fdt, "emi1-slot4");
-                               break;
-                       default:
-                               break;
-                       }
-                       break;
-               default:
-                       break;
-               }
-       }
-}
-
-int board_eth_init(struct bd_info *bis)
-{
-       int i, idx, lane, slot, interface;
-       struct memac_mdio_info dtsec_mdio_info;
-       struct ccsr_gur *gur = (void *)(CFG_SYS_FSL_GUTS_ADDR);
-       u32 srds_s1, srds_s2;
-       u8 brdcfg12;
-
-       srds_s1 = in_be32(&gur->rcwsr[4]) &
-                       FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK;
-       srds_s1 >>= FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_SHIFT;
-
-       srds_s2 = in_be32(&gur->rcwsr[4]) &
-                       FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK;
-       srds_s2 >>= FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_SHIFT;
-
-       /* Initialize the mdio_mux array so we can recognize empty elements */
-       for (i = 0; i < NUM_FM_PORTS; i++)
-               mdio_mux[i] = EMI_NONE;
-
-       dtsec_mdio_info.regs =
-               (struct memac_mdio_controller *)CFG_SYS_FM1_DTSEC_MDIO_ADDR;
-
-       dtsec_mdio_info.name = DEFAULT_FM_MDIO_NAME;
-
-       /* Register the 1G MDIO bus */
-       fm_memac_mdio_init(bis, &dtsec_mdio_info);
-
-       /* Register the muxing front-ends to the MDIO buses */
-       ls1046aqds_mdio_init(DEFAULT_FM_MDIO_NAME, EMI1_RGMII1);
-       ls1046aqds_mdio_init(DEFAULT_FM_MDIO_NAME, EMI1_RGMII2);
-       ls1046aqds_mdio_init(DEFAULT_FM_MDIO_NAME, EMI1_SLOT1);
-       ls1046aqds_mdio_init(DEFAULT_FM_MDIO_NAME, EMI1_SLOT2);
-       ls1046aqds_mdio_init(DEFAULT_FM_MDIO_NAME, EMI1_SLOT4);
-
-       /* Set the two on-board RGMII PHY address */
-       fm_info_set_phy_address(FM1_DTSEC3, RGMII_PHY1_ADDR);
-       fm_info_set_phy_address(FM1_DTSEC4, RGMII_PHY2_ADDR);
-
-       switch (srds_s1) {
-       case 0x3333:
-               /* SGMII on slot 1, MAC 9 */
-               fm_info_set_phy_address(FM1_DTSEC9, SGMII_CARD_PORT1_PHY_ADDR);
-       case 0x1333:
-       case 0x2333:
-               /* SGMII on slot 1, MAC 10 */
-               fm_info_set_phy_address(FM1_DTSEC10, SGMII_CARD_PORT2_PHY_ADDR);
-       case 0x1133:
-       case 0x2233:
-               /* SGMII on slot 1, MAC 5/6 */
-               fm_info_set_phy_address(FM1_DTSEC5, SGMII_CARD_PORT3_PHY_ADDR);
-               fm_info_set_phy_address(FM1_DTSEC6, SGMII_CARD_PORT4_PHY_ADDR);
-               break;
-       case 0x1040:
-       case 0x2040:
-               /* QSGMII on lane B, MAC 6/5/10/1 */
-               fm_info_set_phy_address(FM1_DTSEC6,
-                                       QSGMII_CARD_PORT1_PHY_ADDR_S2);
-               fm_info_set_phy_address(FM1_DTSEC5,
-                                       QSGMII_CARD_PORT2_PHY_ADDR_S2);
-               fm_info_set_phy_address(FM1_DTSEC10,
-                                       QSGMII_CARD_PORT3_PHY_ADDR_S2);
-               fm_info_set_phy_address(FM1_DTSEC1,
-                                       QSGMII_CARD_PORT4_PHY_ADDR_S2);
-               break;
-       case 0x3363:
-               /* SGMII on slot 1, MAC 9/10 */
-               fm_info_set_phy_address(FM1_DTSEC9, SGMII_CARD_PORT1_PHY_ADDR);
-               fm_info_set_phy_address(FM1_DTSEC10, SGMII_CARD_PORT2_PHY_ADDR);
-       case 0x1163:
-       case 0x2263:
-       case 0x2223:
-               /* SGMII on slot 1, MAC 6 */
-               fm_info_set_phy_address(FM1_DTSEC6, SGMII_CARD_PORT4_PHY_ADDR);
-               break;
-       default:
-               printf("Invalid SerDes protocol 0x%x for LS1046AQDS\n",
-                      srds_s1);
-               break;
-       }
-
-       if (srds_s2 == 0x5a59 || srds_s2 == 0x5a06)
-               /* SGMII on slot 4, MAC 2 */
-               fm_info_set_phy_address(FM1_DTSEC2, SGMII_CARD_PORT1_PHY_ADDR);
-
-       for (i = FM1_DTSEC1; i < FM1_DTSEC1 + CFG_SYS_NUM_FM1_DTSEC; i++) {
-               idx = i - FM1_DTSEC1;
-               interface = fm_info_get_enet_if(i);
-               switch (interface) {
-               case PHY_INTERFACE_MODE_SGMII:
-               case PHY_INTERFACE_MODE_QSGMII:
-                       if (interface == PHY_INTERFACE_MODE_SGMII) {
-                               if (i == FM1_DTSEC5) {
-                                       /* route lane 2 to slot1 so to have
-                                        * one sgmii riser card supports
-                                        * MAC5 and MAC6.
-                                        */
-                                       brdcfg12 = QIXIS_READ(brdcfg[12]);
-                                       QIXIS_WRITE(brdcfg[12],
-                                                   brdcfg12 | 0x80);
-                               }
-                               lane = serdes_get_first_lane(FSL_SRDS_1,
-                                               SGMII_FM1_DTSEC1 + idx);
-                       } else {
-                               /* clear the bit 7 to route lane B on slot2. */
-                               brdcfg12 = QIXIS_READ(brdcfg[12]);
-                               QIXIS_WRITE(brdcfg[12], brdcfg12 & 0x7f);
-
-                               lane = serdes_get_first_lane(FSL_SRDS_1,
-                                               QSGMII_FM1_A);
-                               lane_to_slot[lane] = 2;
-                       }
-
-                       if (i == FM1_DTSEC2)
-                               lane = 5;
-
-                       if (lane < 0)
-                               break;
-
-                       slot = lane_to_slot[lane];
-                       debug("FM1@DTSEC%u expects SGMII in slot %u\n",
-                             idx + 1, slot);
-                       if (QIXIS_READ(present2) & (1 << (slot - 1)))
-                               fm_disable_port(i);
-
-                       switch (slot) {
-                       case 1:
-                               mdio_mux[i] = EMI1_SLOT1;
-                               fm_info_set_mdio(i, mii_dev_for_muxval(
-                                                mdio_mux[i]));
-                               break;
-                       case 2:
-                               mdio_mux[i] = EMI1_SLOT2;
-                               fm_info_set_mdio(i, mii_dev_for_muxval(
-                                                mdio_mux[i]));
-                               break;
-                       case 4:
-                               mdio_mux[i] = EMI1_SLOT4;
-                               fm_info_set_mdio(i, mii_dev_for_muxval(
-                                                mdio_mux[i]));
-                               break;
-                       default:
-                               break;
-                       }
-                       break;
-               case PHY_INTERFACE_MODE_RGMII:
-               case PHY_INTERFACE_MODE_RGMII_TXID:
-               case PHY_INTERFACE_MODE_RGMII_RXID:
-               case PHY_INTERFACE_MODE_RGMII_ID:
-                       if (i == FM1_DTSEC3)
-                               mdio_mux[i] = EMI1_RGMII1;
-                       else if (i == FM1_DTSEC4)
-                               mdio_mux[i] = EMI1_RGMII2;
-                       fm_info_set_mdio(i, mii_dev_for_muxval(mdio_mux[i]));
-                       break;
-               default:
-                       break;
-               }
-       }
-
-       cpu_eth_init(bis);
-
-       return pci_eth_init(bis);
-}
-#endif /* CONFIG_FMAN_ENET */
diff --git a/board/freescale/ls1046aqds/ls1046aqds.c 
b/board/freescale/ls1046aqds/ls1046aqds.c
deleted file mode 100644
index 3d0881643cd..00000000000
--- a/board/freescale/ls1046aqds/ls1046aqds.c
+++ /dev/null
@@ -1,484 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright 2016 Freescale Semiconductor, Inc.
- * Copyright 2019-2021 NXP
- */
-
-#include <common.h>
-#include <clock_legacy.h>
-#include <i2c.h>
-#include <fdt_support.h>
-#include <fsl_ddr_sdram.h>
-#include <init.h>
-#include <asm/global_data.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/fsl_serdes.h>
-#include <asm/arch/ppa.h>
-#include <asm/arch/fdt.h>
-#include <asm/arch/mmu.h>
-#include <asm/arch/cpu.h>
-#include <asm/arch/soc.h>
-#include <asm/arch-fsl-layerscape/fsl_icid.h>
-#include <ahci.h>
-#include <hwconfig.h>
-#include <mmc.h>
-#include <scsi.h>
-#include <fm_eth.h>
-#include <fsl_csu.h>
-#include <fsl_esdhc.h>
-#include <fsl_ifc.h>
-#include <spl.h>
-#include "../common/i2c_mux.h"
-
-#include "../common/vid.h"
-#include "../common/qixis.h"
-#include "ls1046aqds_qixis.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#ifdef CONFIG_TFABOOT
-struct ifc_regs ifc_cfg_nor_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = {
-       {
-               "nor0",
-               CFG_SYS_NOR0_CSPR,
-               CFG_SYS_NOR0_CSPR_EXT,
-               CFG_SYS_NOR_AMASK,
-               CFG_SYS_NOR_CSOR,
-               {
-                       CFG_SYS_NOR_FTIM0,
-                       CFG_SYS_NOR_FTIM1,
-                       CFG_SYS_NOR_FTIM2,
-                       CFG_SYS_NOR_FTIM3
-               },
-
-       },
-       {
-               "nor1",
-               CFG_SYS_NOR1_CSPR,
-               CFG_SYS_NOR1_CSPR_EXT,
-               CFG_SYS_NOR_AMASK,
-               CFG_SYS_NOR_CSOR,
-               {
-                       CFG_SYS_NOR_FTIM0,
-                       CFG_SYS_NOR_FTIM1,
-                       CFG_SYS_NOR_FTIM2,
-                       CFG_SYS_NOR_FTIM3
-               },
-       },
-       {
-               "nand",
-               CFG_SYS_NAND_CSPR,
-               CFG_SYS_NAND_CSPR_EXT,
-               CFG_SYS_NAND_AMASK,
-               CFG_SYS_NAND_CSOR,
-               {
-                       CFG_SYS_NAND_FTIM0,
-                       CFG_SYS_NAND_FTIM1,
-                       CFG_SYS_NAND_FTIM2,
-                       CFG_SYS_NAND_FTIM3
-               },
-       },
-       {
-               "fpga",
-               CFG_SYS_FPGA_CSPR,
-               CFG_SYS_FPGA_CSPR_EXT,
-               CFG_SYS_FPGA_AMASK,
-               CFG_SYS_FPGA_CSOR,
-               {
-                       CFG_SYS_FPGA_FTIM0,
-                       CFG_SYS_FPGA_FTIM1,
-                       CFG_SYS_FPGA_FTIM2,
-                       CFG_SYS_FPGA_FTIM3
-               },
-       }
-};
-
-struct ifc_regs ifc_cfg_nand_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = {
-       {
-               "nand",
-               CFG_SYS_NAND_CSPR,
-               CFG_SYS_NAND_CSPR_EXT,
-               CFG_SYS_NAND_AMASK,
-               CFG_SYS_NAND_CSOR,
-               {
-                       CFG_SYS_NAND_FTIM0,
-                       CFG_SYS_NAND_FTIM1,
-                       CFG_SYS_NAND_FTIM2,
-                       CFG_SYS_NAND_FTIM3
-               },
-       },
-       {
-               "nor0",
-               CFG_SYS_NOR0_CSPR,
-               CFG_SYS_NOR0_CSPR_EXT,
-               CFG_SYS_NOR_AMASK,
-               CFG_SYS_NOR_CSOR,
-               {
-                       CFG_SYS_NOR_FTIM0,
-                       CFG_SYS_NOR_FTIM1,
-                       CFG_SYS_NOR_FTIM2,
-                       CFG_SYS_NOR_FTIM3
-               },
-       },
-       {
-               "nor1",
-               CFG_SYS_NOR1_CSPR,
-               CFG_SYS_NOR1_CSPR_EXT,
-               CFG_SYS_NOR_AMASK,
-               CFG_SYS_NOR_CSOR,
-               {
-                       CFG_SYS_NOR_FTIM0,
-                       CFG_SYS_NOR_FTIM1,
-                       CFG_SYS_NOR_FTIM2,
-                       CFG_SYS_NOR_FTIM3
-               },
-       },
-       {
-               "fpga",
-               CFG_SYS_FPGA_CSPR,
-               CFG_SYS_FPGA_CSPR_EXT,
-               CFG_SYS_FPGA_AMASK,
-               CFG_SYS_FPGA_CSOR,
-               {
-                       CFG_SYS_FPGA_FTIM0,
-                       CFG_SYS_FPGA_FTIM1,
-                       CFG_SYS_FPGA_FTIM2,
-                       CFG_SYS_FPGA_FTIM3
-               },
-       }
-};
-
-void ifc_cfg_boot_info(struct ifc_regs_info *regs_info)
-{
-       enum boot_src src = get_boot_src();
-
-       if (src == BOOT_SOURCE_IFC_NAND)
-               regs_info->regs = ifc_cfg_nand_boot;
-       else
-               regs_info->regs = ifc_cfg_nor_boot;
-       regs_info->cs_size = CONFIG_SYS_FSL_IFC_BANK_COUNT;
-}
-
-#endif
-
-enum {
-       MUX_TYPE_GPIO,
-};
-
-int checkboard(void)
-{
-#ifdef CONFIG_TFABOOT
-       enum boot_src src = get_boot_src();
-#endif
-       char buf[64];
-#ifndef CONFIG_SD_BOOT
-       u8 sw;
-#endif
-
-       puts("Board: LS1046AQDS, boot from ");
-
-#ifdef CONFIG_TFABOOT
-       if (src == BOOT_SOURCE_SD_MMC)
-               puts("SD\n");
-       else {
-#endif
-
-#ifdef CONFIG_SD_BOOT
-       puts("SD\n");
-#else
-       sw = QIXIS_READ(brdcfg[0]);
-       sw = (sw & QIXIS_LBMAP_MASK) >> QIXIS_LBMAP_SHIFT;
-
-       if (sw < 0x8)
-               printf("vBank: %d\n", sw);
-       else if (sw == 0x8)
-               puts("PromJet\n");
-       else if (sw == 0x9)
-               puts("NAND\n");
-       else if (sw == 0xF)
-               printf("QSPI\n");
-       else
-               printf("invalid setting of SW%u\n", QIXIS_LBMAP_SWITCH);
-#endif
-
-#ifdef CONFIG_TFABOOT
-       }
-#endif
-       printf("Sys ID: 0x%02x, Sys Ver: 0x%02x\n",
-              QIXIS_READ(id), QIXIS_READ(arch));
-
-       printf("FPGA:  v%d (%s), build %d\n",
-              (int)QIXIS_READ(scver), qixis_read_tag(buf),
-              (int)qixis_read_minor());
-
-       return 0;
-}
-
-bool if_board_diff_clk(void)
-{
-       u8 diff_conf = QIXIS_READ(brdcfg[11]);
-
-       return diff_conf & 0x40;
-}
-
-unsigned long get_board_sys_clk(void)
-{
-       u8 sysclk_conf = QIXIS_READ(brdcfg[1]);
-
-       switch (sysclk_conf & 0x0f) {
-       case QIXIS_SYSCLK_64:
-               return 64000000;
-       case QIXIS_SYSCLK_83:
-               return 83333333;
-       case QIXIS_SYSCLK_100:
-               return 100000000;
-       case QIXIS_SYSCLK_125:
-               return 125000000;
-       case QIXIS_SYSCLK_133:
-               return 133333333;
-       case QIXIS_SYSCLK_150:
-               return 150000000;
-       case QIXIS_SYSCLK_160:
-               return 160000000;
-       case QIXIS_SYSCLK_166:
-               return 166666666;
-       }
-
-       return 66666666;
-}
-
-unsigned long get_board_ddr_clk(void)
-{
-       u8 ddrclk_conf = QIXIS_READ(brdcfg[1]);
-
-       if (if_board_diff_clk())
-               return get_board_sys_clk();
-       switch ((ddrclk_conf & 0x30) >> 4) {
-       case QIXIS_DDRCLK_100:
-               return 100000000;
-       case QIXIS_DDRCLK_125:
-               return 125000000;
-       case QIXIS_DDRCLK_133:
-               return 133333333;
-       }
-
-       return 66666666;
-}
-
-#ifdef CONFIG_LPUART
-u32 get_lpuart_clk(void)
-{
-       return gd->bus_clk;
-}
-#endif
-
-int dram_init(void)
-{
-       /*
-        * When resuming from deep sleep, the I2C channel may not be
-        * in the default channel. So, switch to the default channel
-        * before accessing DDR SPD.
-        *
-        * PCA9547 mount on I2C1 bus
-        */
-       select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT, 0);
-       fsl_initdram();
-#if (!defined(CONFIG_SPL) && !defined(CONFIG_TFABOOT)) || \
-       defined(CONFIG_SPL_BUILD)
-       /* This will break-before-make MMU for DDR */
-       update_early_mmu_table();
-#endif
-
-       return 0;
-}
-
-int i2c_multiplexer_select_vid_channel(u8 channel)
-{
-       return select_i2c_ch_pca9547(channel, 0);
-}
-
-int board_early_init_f(void)
-{
-       u32 __iomem *cntcr = (u32 *)CFG_SYS_FSL_TIMER_ADDR;
-#ifdef CONFIG_HAS_FSL_XHCI_USB
-       struct ccsr_scfg *scfg = (struct ccsr_scfg *)CFG_SYS_FSL_SCFG_ADDR;
-       u32 usb_pwrfault;
-#endif
-#ifdef CONFIG_LPUART
-       u8 uart;
-#endif
-
-       /*
-        * Enable secure system counter for timer
-        */
-       out_le32(cntcr, 0x1);
-
-#if defined(CONFIG_SYS_I2C_EARLY_INIT)
-       i2c_early_init_f();
-#endif
-       fsl_lsch2_early_init_f();
-
-#ifdef CONFIG_HAS_FSL_XHCI_USB
-       out_be32(&scfg->rcwpmuxcr0, 0x3333);
-       out_be32(&scfg->usbdrvvbus_selcr, SCFG_USBDRVVBUS_SELCR_USB1);
-       usb_pwrfault = (SCFG_USBPWRFAULT_DEDICATED <<
-                       SCFG_USBPWRFAULT_USB3_SHIFT) |
-                       (SCFG_USBPWRFAULT_DEDICATED <<
-                       SCFG_USBPWRFAULT_USB2_SHIFT) |
-                       (SCFG_USBPWRFAULT_SHARED <<
-                       SCFG_USBPWRFAULT_USB1_SHIFT);
-       out_be32(&scfg->usbpwrfault_selcr, usb_pwrfault);
-#endif
-
-#ifdef CONFIG_LPUART
-       /* We use lpuart0 as system console */
-       uart = QIXIS_READ(brdcfg[14]);
-       uart &= ~CFG_UART_MUX_MASK;
-       uart |= CFG_LPUART_EN << CFG_UART_MUX_SHIFT;
-       QIXIS_WRITE(brdcfg[14], uart);
-#endif
-
-       return 0;
-}
-
-#ifdef CONFIG_FSL_DEEP_SLEEP
-/* determine if it is a warm boot */
-bool is_warm_boot(void)
-{
-#define DCFG_CCSR_CRSTSR_WDRFR (1 << 3)
-       struct ccsr_gur __iomem *gur = (void *)CFG_SYS_FSL_GUTS_ADDR;
-
-       if (in_be32(&gur->crstsr) & DCFG_CCSR_CRSTSR_WDRFR)
-               return 1;
-
-       return 0;
-}
-#endif
-
-int config_board_mux(int ctrl_type)
-{
-       u8 reg14;
-
-       reg14 = QIXIS_READ(brdcfg[14]);
-
-       switch (ctrl_type) {
-       case MUX_TYPE_GPIO:
-               reg14 = (reg14 & (~0x6)) | 0x2;
-               break;
-       default:
-               puts("Unsupported mux interface type\n");
-               return -1;
-       }
-
-       QIXIS_WRITE(brdcfg[14], reg14);
-
-       return 0;
-}
-
-int config_serdes_mux(void)
-{
-       return 0;
-}
-
-#ifdef CONFIG_MISC_INIT_R
-int misc_init_r(void)
-{
-       if (hwconfig("gpio"))
-               config_board_mux(MUX_TYPE_GPIO);
-
-       return 0;
-}
-#endif
-
-int board_init(void)
-{
-       select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT, 0);
-
-#ifdef CFG_SYS_FSL_SERDES
-       config_serdes_mux();
-#endif
-
-       if (adjust_vdd(0))
-               printf("Warning: Adjusting core voltage failed.\n");
-
-#ifdef CONFIG_FSL_LS_PPA
-       ppa_init();
-#endif
-
-#ifdef CONFIG_NXP_ESBC
-       /*
-        * In case of Secure Boot, the IBR configures the SMMU
-        * to allow only Secure transactions.
-        * SMMU must be reset in bypass mode.
-        * Set the ClientPD bit and Clear the USFCFG Bit
-        */
-       u32 val;
-       val = (in_le32(SMMU_SCR0) | SCR0_CLIENTPD_MASK) & ~(SCR0_USFCFG_MASK);
-       out_le32(SMMU_SCR0, val);
-       val = (in_le32(SMMU_NSCR0) | SCR0_CLIENTPD_MASK) & ~(SCR0_USFCFG_MASK);
-       out_le32(SMMU_NSCR0, val);
-#endif
-
-       return 0;
-}
-
-#ifdef CONFIG_OF_BOARD_SETUP
-int ft_board_setup(void *blob, struct bd_info *bd)
-{
-       u64 base[CONFIG_NR_DRAM_BANKS];
-       u64 size[CONFIG_NR_DRAM_BANKS];
-       u8 reg;
-
-       /* fixup DT for the two DDR banks */
-       base[0] = gd->bd->bi_dram[0].start;
-       size[0] = gd->bd->bi_dram[0].size;
-       base[1] = gd->bd->bi_dram[1].start;
-       size[1] = gd->bd->bi_dram[1].size;
-
-       fdt_fixup_memory_banks(blob, base, size, 2);
-       ft_cpu_setup(blob, bd);
-
-#ifdef CONFIG_FMAN_ENET
-       fdt_fixup_board_enet(blob);
-#endif
-
-       fdt_fixup_icid(blob);
-
-       reg = QIXIS_READ(brdcfg[0]);
-       reg = (reg & QIXIS_LBMAP_MASK) >> QIXIS_LBMAP_SHIFT;
-
-       /* Disable IFC if QSPI is enabled */
-       if (reg == 0xF)
-               do_fixup_by_compat(blob, "fsl,ifc",
-                                  "status", "disabled", 8 + 1, 1);
-
-       return 0;
-}
-#endif
-
-u8 flash_read8(void *addr)
-{
-       return __raw_readb(addr + 1);
-}
-
-void flash_write16(u16 val, void *addr)
-{
-       u16 shftval = (((val >> 8) & 0xff) | ((val << 8) & 0xff00));
-
-       __raw_writew(shftval, addr);
-}
-
-u16 flash_read16(void *addr)
-{
-       u16 val = __raw_readw(addr);
-
-       return (((val) >> 8) & 0x00ff) | (((val) << 8) & 0xff00);
-}
-
-#if defined(CONFIG_TFABOOT) && defined(CONFIG_ENV_IS_IN_SPI_FLASH)
-void *env_sf_get_env_addr(void)
-{
-       return (void *)(CFG_SYS_FSL_QSPI_BASE + CONFIG_ENV_OFFSET);
-}
-#endif
diff --git a/board/freescale/ls1046aqds/ls1046aqds_pbi.cfg 
b/board/freescale/ls1046aqds/ls1046aqds_pbi.cfg
deleted file mode 100644
index 5a6b7b84a4c..00000000000
--- a/board/freescale/ls1046aqds/ls1046aqds_pbi.cfg
+++ /dev/null
@@ -1,17 +0,0 @@
-#Configure Scratch register
-09570600 00000000
-09570604 10000000
-#Alt base register
-09570158 00001000
-#Disable CCI barrier tranaction
-09570178 0000e010
-09180000 00000008
-#USB PHY frequency sel
-09570418 0000009e
-0957041c 0000009e
-09570420 0000009e
-#Serdes SATA
-09eb1300 80104e20
-09eb08dc 00502880
-#flush PBI data
-096100c0 000fffff
diff --git a/board/freescale/ls1046aqds/ls1046aqds_qixis.h 
b/board/freescale/ls1046aqds/ls1046aqds_qixis.h
deleted file mode 100644
index f371056e37a..00000000000
--- a/board/freescale/ls1046aqds/ls1046aqds_qixis.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright 2016 Freescale Semiconductor, Inc.
- */
-
-#ifndef __LS1046AQDS_QIXIS_H__
-#define __LS1046AQDS_QIXIS_H__
-
-/* Definitions of QIXIS Registers for LS1046AQDS */
-
-/* BRDCFG4[4:7] select EC1 and EC2 as a pair */
-#define BRDCFG4_EMISEL_MASK            0xe0
-#define BRDCFG4_EMISEL_SHIFT           5
-
-/* SYSCLK */
-#define QIXIS_SYSCLK_66                        0x0
-#define QIXIS_SYSCLK_83                        0x1
-#define QIXIS_SYSCLK_100               0x2
-#define QIXIS_SYSCLK_125               0x3
-#define QIXIS_SYSCLK_133               0x4
-#define QIXIS_SYSCLK_150               0x5
-#define QIXIS_SYSCLK_160               0x6
-#define QIXIS_SYSCLK_166               0x7
-#define QIXIS_SYSCLK_64                        0x8
-
-/* DDRCLK */
-#define QIXIS_DDRCLK_66                        0x0
-#define QIXIS_DDRCLK_100               0x1
-#define QIXIS_DDRCLK_125               0x2
-#define QIXIS_DDRCLK_133               0x3
-
-/* BRDCFG2 - SD clock*/
-#define QIXIS_SDCLK1_100               0x0
-#define QIXIS_SDCLK1_125               0x1
-#define QIXIS_SDCLK1_165               0x2
-#define QIXIS_SDCLK1_100_SP            0x3
-
-#endif
diff --git a/board/freescale/ls1046aqds/ls1046aqds_rcw_nand.cfg 
b/board/freescale/ls1046aqds/ls1046aqds_rcw_nand.cfg
deleted file mode 100644
index b5fc08ce2ab..00000000000
--- a/board/freescale/ls1046aqds/ls1046aqds_rcw_nand.cfg
+++ /dev/null
@@ -1,7 +0,0 @@
-#PBL preamble and RCW header
-aa55aa55 01ee0100
-# serdes protocol
-0c150010 0e000000 00000000 00000000
-11335559 40005012 e0116000 c1000000
-00000000 00000000 00000000 00038800
-00000000 01001101 00000096 00000001
diff --git a/board/freescale/ls1046aqds/ls1046aqds_rcw_sd_ifc.cfg 
b/board/freescale/ls1046aqds/ls1046aqds_rcw_sd_ifc.cfg
deleted file mode 100644
index 59d24d67908..00000000000
--- a/board/freescale/ls1046aqds/ls1046aqds_rcw_sd_ifc.cfg
+++ /dev/null
@@ -1,8 +0,0 @@
-#PBL preamble and RCW header
-aa55aa55 01ee0100
-# RCW
-# Enable IFC; disable QSPI
-0c150010 0e000000 00000000 00000000
-11335559 40005012 60040000 c1000000
-00000000 00000000 00000000 00038800
-00000000 01001101 00000096 00000001
diff --git a/board/freescale/ls1046aqds/ls1046aqds_rcw_sd_qspi.cfg 
b/board/freescale/ls1046aqds/ls1046aqds_rcw_sd_qspi.cfg
deleted file mode 100644
index 9401a6f0f4f..00000000000
--- a/board/freescale/ls1046aqds/ls1046aqds_rcw_sd_qspi.cfg
+++ /dev/null
@@ -1,8 +0,0 @@
-#PBL preamble and RCW header
-aa55aa55 01ee0100
-# RCW
-# Enable QSPI; disable IFC
-0c150010 0e000000 00000000 00000000
-11335559 40005012 60040000 c1000000
-00000000 00000000 00000000 00038800
-20124000 01001101 00000096 00000001
diff --git a/configs/ls1046aqds_SECURE_BOOT_defconfig 
b/configs/ls1046aqds_SECURE_BOOT_defconfig
deleted file mode 100644
index 2bf8a949256..00000000000
--- a/configs/ls1046aqds_SECURE_BOOT_defconfig
+++ /dev/null
@@ -1,108 +0,0 @@
-CONFIG_ARM=y
-CONFIG_COUNTER_FREQUENCY=25000000
-CONFIG_TARGET_LS1046AQDS=y
-CONFIG_TEXT_BASE=0x60100000
-CONFIG_SYS_MALLOC_LEN=0x120000
-CONFIG_NR_DRAM_BANKS=2
-CONFIG_ENV_SIZE=0x20000
-CONFIG_SYS_I2C_MXC_I2C1=y
-CONFIG_SYS_I2C_MXC_I2C2=y
-CONFIG_SYS_I2C_MXC_I2C3=y
-CONFIG_SYS_I2C_MXC_I2C4=y
-CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
-CONFIG_FSL_LS_PPA=y
-CONFIG_AHCI=y
-CONFIG_NXP_ESBC=y
-CONFIG_LAYERSCAPE_NS_ACCESS=y
-CONFIG_PCIE1=y
-CONFIG_PCIE2=y
-CONFIG_PCIE3=y
-CONFIG_FSL_USE_PCA9547_MUX=y
-CONFIG_VID=y
-CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv"
-CONFIG_VOL_MONITOR_INA220=y
-CONFIG_VOL_MONITOR_IR36021_SET=y
-CONFIG_FSL_QIXIS=y
-# CONFIG_QIXIS_I2C_ACCESS is not set
-CONFIG_SYS_MEMTEST_START=0x80000000
-CONFIG_SYS_MEMTEST_END=0x9fffffff
-CONFIG_DISTRO_DEFAULTS=y
-CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
-CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0
-CONFIG_REMAKE_ELF=y
-CONFIG_MP=y
-CONFIG_FIT_VERBOSE=y
-CONFIG_OF_BOARD_SETUP=y
-CONFIG_DYNAMIC_SYS_CLK_FREQ=y
-CONFIG_BOOTDELAY=10
-CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 
earlycon=uart8250,mmio,0x21c0500 
mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
-CONFIG_BOOTCOMMAND="run distro_bootcmd; run nor_bootcmd; env exists secureboot 
&& esbc_halt;;"
-CONFIG_MISC_INIT_R=y
-CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
-CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_IMLS=y
-CONFIG_CMD_GREPENV=y
-CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_GPT=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
-CONFIG_CMD_PCI=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_CACHE=y
-CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
-CONFIG_OF_CONTROL=y
-CONFIG_ENV_OVERWRITE=y
-CONFIG_SATA=y
-CONFIG_SATA_CEVA=y
-CONFIG_DYNAMIC_DDR_CLK_FREQ=y
-CONFIG_DDR_ECC=y
-CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
-CONFIG_MPC8XXX_GPIO=y
-CONFIG_DM_I2C=y
-CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
-CONFIG_SYS_FSL_SEC_MON_BE=y
-CONFIG_SYS_I2C_EEPROM_ADDR=0x57
-CONFIG_FSL_ESDHC=y
-CONFIG_MTD=y
-CONFIG_MTD_NOR_FLASH=y
-CONFIG_FLASH_CFI_DRIVER=y
-CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
-CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
-CONFIG_SYS_FLASH_EMPTY_INFO=y
-CONFIG_SYS_FLASH_CFI=y
-CONFIG_SYS_FLASH_QUIET_TEST=y
-CONFIG_SYS_MAX_FLASH_SECT=1024
-CONFIG_SYS_MAX_FLASH_BANKS=2
-CONFIG_MTD_RAW_NAND=y
-CONFIG_NAND_FSL_IFC=y
-CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SF_DEFAULT_BUS=1
-CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_SPI_FLASH_SST=y
-CONFIG_PHYLIB=y
-CONFIG_PHYLIB_10G=y
-CONFIG_PHY_REALTEK=y
-CONFIG_PHY_VITESSE=y
-CONFIG_E1000=y
-CONFIG_NVME_PCI=y
-CONFIG_PCI=y
-CONFIG_DM_PCI_COMPAT=y
-CONFIG_PCIE_LAYERSCAPE_RC=y
-CONFIG_PCIE_LAYERSCAPE_EP=y
-CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550_SERIAL=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_FSL_DSPI=y
-CONFIG_USB=y
-CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
-CONFIG_RSA=y
diff --git a/configs/ls1046aqds_defconfig b/configs/ls1046aqds_defconfig
deleted file mode 100644
index 5fe73bc8ac7..00000000000
--- a/configs/ls1046aqds_defconfig
+++ /dev/null
@@ -1,110 +0,0 @@
-CONFIG_ARM=y
-CONFIG_COUNTER_FREQUENCY=25000000
-CONFIG_TARGET_LS1046AQDS=y
-CONFIG_TEXT_BASE=0x60100000
-CONFIG_SYS_MALLOC_LEN=0x120000
-CONFIG_NR_DRAM_BANKS=2
-CONFIG_ENV_SIZE=0x20000
-CONFIG_ENV_SECT_SIZE=0x20000
-CONFIG_SYS_I2C_MXC_I2C1=y
-CONFIG_SYS_I2C_MXC_I2C2=y
-CONFIG_SYS_I2C_MXC_I2C3=y
-CONFIG_SYS_I2C_MXC_I2C4=y
-CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
-CONFIG_FSL_LS_PPA=y
-CONFIG_ENV_ADDR=0x60300000
-CONFIG_AHCI=y
-CONFIG_LAYERSCAPE_NS_ACCESS=y
-CONFIG_PCIE1=y
-CONFIG_PCIE2=y
-CONFIG_PCIE3=y
-CONFIG_FSL_USE_PCA9547_MUX=y
-CONFIG_VID=y
-CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv"
-CONFIG_VOL_MONITOR_INA220=y
-CONFIG_VOL_MONITOR_IR36021_SET=y
-CONFIG_FSL_QIXIS=y
-# CONFIG_QIXIS_I2C_ACCESS is not set
-CONFIG_SYS_MEMTEST_START=0x80000000
-CONFIG_SYS_MEMTEST_END=0x9fffffff
-CONFIG_DISTRO_DEFAULTS=y
-CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
-CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0
-CONFIG_REMAKE_ELF=y
-CONFIG_MP=y
-CONFIG_FIT_VERBOSE=y
-CONFIG_OF_BOARD_SETUP=y
-CONFIG_DYNAMIC_SYS_CLK_FREQ=y
-CONFIG_BOOTDELAY=10
-CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 
earlycon=uart8250,mmio,0x21c0500 
mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
-CONFIG_BOOTCOMMAND="run distro_bootcmd; run nor_bootcmd; env exists secureboot 
&& esbc_halt;;"
-CONFIG_ARCH_MISC_INIT=y
-CONFIG_MISC_INIT_R=y
-CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
-CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_IMLS=y
-CONFIG_CMD_GREPENV=y
-CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_GPT=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
-CONFIG_CMD_PCI=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_CACHE=y
-CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
-CONFIG_OF_CONTROL=y
-CONFIG_ENV_OVERWRITE=y
-CONFIG_ENV_IS_IN_FLASH=y
-CONFIG_SATA=y
-CONFIG_SATA_CEVA=y
-CONFIG_FSL_CAAM=y
-CONFIG_DYNAMIC_DDR_CLK_FREQ=y
-CONFIG_DDR_ECC=y
-CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
-CONFIG_MPC8XXX_GPIO=y
-CONFIG_DM_I2C=y
-CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
-CONFIG_SYS_I2C_EEPROM_ADDR=0x57
-CONFIG_FSL_ESDHC=y
-CONFIG_MTD=y
-CONFIG_MTD_NOR_FLASH=y
-CONFIG_FLASH_CFI_DRIVER=y
-CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
-CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
-CONFIG_SYS_FLASH_EMPTY_INFO=y
-CONFIG_SYS_FLASH_CFI=y
-CONFIG_SYS_FLASH_QUIET_TEST=y
-CONFIG_SYS_MAX_FLASH_SECT=1024
-CONFIG_SYS_MAX_FLASH_BANKS=2
-CONFIG_MTD_RAW_NAND=y
-CONFIG_NAND_FSL_IFC=y
-CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SF_DEFAULT_BUS=1
-CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_SPI_FLASH_SST=y
-CONFIG_PHYLIB=y
-CONFIG_PHYLIB_10G=y
-CONFIG_PHY_REALTEK=y
-CONFIG_PHY_VITESSE=y
-CONFIG_E1000=y
-CONFIG_NVME_PCI=y
-CONFIG_PCI=y
-CONFIG_DM_PCI_COMPAT=y
-CONFIG_PCIE_LAYERSCAPE_RC=y
-CONFIG_PCIE_LAYERSCAPE_EP=y
-CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550_SERIAL=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_FSL_DSPI=y
-CONFIG_USB=y
-CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
diff --git a/configs/ls1046aqds_lpuart_defconfig 
b/configs/ls1046aqds_lpuart_defconfig
deleted file mode 100644
index defcac0a9be..00000000000
--- a/configs/ls1046aqds_lpuart_defconfig
+++ /dev/null
@@ -1,112 +0,0 @@
-CONFIG_ARM=y
-CONFIG_COUNTER_FREQUENCY=25000000
-CONFIG_TARGET_LS1046AQDS=y
-CONFIG_TEXT_BASE=0x60100000
-CONFIG_SYS_MALLOC_LEN=0x120000
-CONFIG_NR_DRAM_BANKS=2
-CONFIG_ENV_SIZE=0x20000
-CONFIG_ENV_SECT_SIZE=0x20000
-CONFIG_SYS_I2C_MXC_I2C1=y
-CONFIG_SYS_I2C_MXC_I2C2=y
-CONFIG_SYS_I2C_MXC_I2C3=y
-CONFIG_SYS_I2C_MXC_I2C4=y
-CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-lpuart"
-CONFIG_FSL_LS_PPA=y
-CONFIG_ENV_ADDR=0x60300000
-CONFIG_AHCI=y
-CONFIG_LAYERSCAPE_NS_ACCESS=y
-CONFIG_PCIE1=y
-CONFIG_PCIE2=y
-CONFIG_PCIE3=y
-CONFIG_FSL_USE_PCA9547_MUX=y
-CONFIG_VID=y
-CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv"
-CONFIG_VOL_MONITOR_INA220=y
-CONFIG_VOL_MONITOR_IR36021_SET=y
-CONFIG_FSL_QIXIS=y
-# CONFIG_QIXIS_I2C_ACCESS is not set
-CONFIG_SYS_MEMTEST_START=0x80000000
-CONFIG_SYS_MEMTEST_END=0x9fffffff
-CONFIG_DISTRO_DEFAULTS=y
-CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
-CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0
-CONFIG_REMAKE_ELF=y
-CONFIG_MP=y
-CONFIG_FIT_VERBOSE=y
-CONFIG_OF_BOARD_SETUP=y
-CONFIG_DYNAMIC_SYS_CLK_FREQ=y
-CONFIG_BOOTDELAY=10
-CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 
earlycon=uart8250,mmio,0x21c0500 
mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
-CONFIG_BOOTCOMMAND="run distro_bootcmd; run nor_bootcmd; env exists secureboot 
&& esbc_halt;;"
-CONFIG_ARCH_MISC_INIT=y
-CONFIG_MISC_INIT_R=y
-CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
-CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_IMLS=y
-CONFIG_CMD_GREPENV=y
-CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_GPT=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
-CONFIG_CMD_PCI=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_CACHE=y
-CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
-CONFIG_OF_CONTROL=y
-CONFIG_ENV_OVERWRITE=y
-CONFIG_ENV_IS_IN_FLASH=y
-CONFIG_SATA=y
-CONFIG_SATA_CEVA=y
-CONFIG_FSL_CAAM=y
-CONFIG_DYNAMIC_DDR_CLK_FREQ=y
-CONFIG_DDR_ECC=y
-CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
-CONFIG_MPC8XXX_GPIO=y
-CONFIG_DM_I2C=y
-CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
-CONFIG_SYS_I2C_EEPROM_ADDR=0x57
-CONFIG_FSL_ESDHC=y
-CONFIG_MTD=y
-CONFIG_MTD_NOR_FLASH=y
-CONFIG_FLASH_CFI_DRIVER=y
-CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
-CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
-CONFIG_SYS_FLASH_EMPTY_INFO=y
-CONFIG_SYS_FLASH_CFI=y
-CONFIG_SYS_FLASH_QUIET_TEST=y
-CONFIG_SYS_MAX_FLASH_SECT=1024
-CONFIG_SYS_MAX_FLASH_BANKS=2
-CONFIG_MTD_RAW_NAND=y
-CONFIG_NAND_FSL_IFC=y
-CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SF_DEFAULT_BUS=1
-CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_SPI_FLASH_SST=y
-CONFIG_PHYLIB=y
-CONFIG_PHYLIB_10G=y
-CONFIG_PHY_REALTEK=y
-CONFIG_PHY_VITESSE=y
-CONFIG_E1000=y
-CONFIG_NVME_PCI=y
-CONFIG_PCI=y
-CONFIG_DM_PCI_COMPAT=y
-CONFIG_PCIE_LAYERSCAPE_RC=y
-CONFIG_PCIE_LAYERSCAPE_EP=y
-CONFIG_DM_SCSI=y
-CONFIG_DM_SERIAL=y
-CONFIG_FSL_LPUART=y
-CONFIG_LPUART=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_FSL_DSPI=y
-CONFIG_USB=y
-CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
diff --git a/configs/ls1046aqds_nand_defconfig 
b/configs/ls1046aqds_nand_defconfig
deleted file mode 100644
index 7c8a1e70fad..00000000000
--- a/configs/ls1046aqds_nand_defconfig
+++ /dev/null
@@ -1,139 +0,0 @@
-CONFIG_ARM=y
-CONFIG_COUNTER_FREQUENCY=25000000
-CONFIG_TARGET_LS1046AQDS=y
-CONFIG_TEXT_BASE=0x82000000
-CONFIG_SYS_MALLOC_LEN=0x102000
-CONFIG_SPL_LIBCOMMON_SUPPORT=y
-CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_NR_DRAM_BANKS=2
-CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_OFFSET=0x300000
-CONFIG_SYS_I2C_MXC_I2C1=y
-CONFIG_SYS_I2C_MXC_I2C2=y
-CONFIG_SYS_I2C_MXC_I2C3=y
-CONFIG_SYS_I2C_MXC_I2C4=y
-CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
-CONFIG_SPL_TEXT_BASE=0x10000000
-CONFIG_FSL_LS_PPA=y
-CONFIG_SPL_SERIAL=y
-CONFIG_SPL_DRIVERS_MISC=y
-CONFIG_SPL=y
-CONFIG_AHCI=y
-CONFIG_LAYERSCAPE_NS_ACCESS=y
-CONFIG_PCIE1=y
-CONFIG_PCIE2=y
-CONFIG_PCIE3=y
-CONFIG_FSL_USE_PCA9547_MUX=y
-CONFIG_VID=y
-CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv"
-CONFIG_VOL_MONITOR_INA220=y
-CONFIG_VOL_MONITOR_IR36021_SET=y
-CONFIG_FSL_QIXIS=y
-# CONFIG_QIXIS_I2C_ACCESS is not set
-CONFIG_SYS_MEMTEST_START=0x80000000
-CONFIG_SYS_MEMTEST_END=0x9fffffff
-CONFIG_DISTRO_DEFAULTS=y
-CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
-CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0
-CONFIG_REMAKE_ELF=y
-CONFIG_SYS_MONITOR_LEN=655360
-CONFIG_MP=y
-CONFIG_FIT_VERBOSE=y
-CONFIG_OF_BOARD_SETUP=y
-CONFIG_DYNAMIC_SYS_CLK_FREQ=y
-CONFIG_RAMBOOT_PBL=y
-CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1046aqds/ls1046aqds_pbi.cfg"
-CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1046aqds/ls1046aqds_rcw_nand.cfg"
-CONFIG_NAND_BOOT=y
-CONFIG_BOOTDELAY=10
-CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 
earlycon=uart8250,mmio,0x21c0500 
mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
-CONFIG_BOOTCOMMAND="run distro_bootcmd; run nand_bootcmd; env exists 
secureboot && esbc_halt;;"
-CONFIG_ARCH_MISC_INIT=y
-CONFIG_MISC_INIT_R=y
-CONFIG_SPL_MAX_SIZE=0x17000
-CONFIG_SPL_PAD_TO=0x40000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x8f000000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
-CONFIG_SPL_FSL_PBL=y
-CONFIG_SPL_BOARD_INIT=y
-# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK=0x1001f000
-CONFIG_SYS_SPL_MALLOC=y
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110
-CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR=y
-CONFIG_SPL_NAND_SUPPORT=y
-CONFIG_SPL_WATCHDOG=y
-CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
-CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_IMLS=y
-CONFIG_CMD_GREPENV=y
-CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_GPT=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
-CONFIG_CMD_PCI=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_CACHE=y
-CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
-CONFIG_OF_CONTROL=y
-CONFIG_ENV_OVERWRITE=y
-CONFIG_ENV_IS_IN_NAND=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_SATA=y
-CONFIG_SATA_CEVA=y
-CONFIG_FSL_CAAM=y
-CONFIG_DYNAMIC_DDR_CLK_FREQ=y
-CONFIG_DDR_ECC=y
-CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
-CONFIG_MPC8XXX_GPIO=y
-CONFIG_DM_I2C=y
-CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
-CONFIG_SYS_I2C_EEPROM_ADDR=0x57
-CONFIG_FSL_ESDHC=y
-CONFIG_MTD=y
-CONFIG_MTD_NOR_FLASH=y
-CONFIG_FLASH_CFI_DRIVER=y
-CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
-CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
-CONFIG_SYS_FLASH_EMPTY_INFO=y
-CONFIG_SYS_FLASH_CFI=y
-CONFIG_SYS_FLASH_QUIET_TEST=y
-CONFIG_SYS_MAX_FLASH_SECT=1024
-CONFIG_SYS_MAX_FLASH_BANKS=2
-CONFIG_NAND_FSL_IFC=y
-CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
-CONFIG_SYS_NAND_U_BOOT_OFFS=0x40000
-CONFIG_SF_DEFAULT_BUS=1
-CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_SPI_FLASH_SST=y
-CONFIG_PHYLIB=y
-CONFIG_PHYLIB_10G=y
-CONFIG_PHY_REALTEK=y
-CONFIG_PHY_VITESSE=y
-CONFIG_E1000=y
-CONFIG_NVME_PCI=y
-CONFIG_PCI=y
-CONFIG_DM_PCI_COMPAT=y
-CONFIG_PCIE_LAYERSCAPE_RC=y
-CONFIG_PCIE_LAYERSCAPE_EP=y
-CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550_SERIAL=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_FSL_DSPI=y
-CONFIG_USB=y
-CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
diff --git a/configs/ls1046aqds_qspi_defconfig 
b/configs/ls1046aqds_qspi_defconfig
deleted file mode 100644
index 937581536af..00000000000
--- a/configs/ls1046aqds_qspi_defconfig
+++ /dev/null
@@ -1,101 +0,0 @@
-CONFIG_ARM=y
-CONFIG_COUNTER_FREQUENCY=25000000
-CONFIG_TARGET_LS1046AQDS=y
-CONFIG_TEXT_BASE=0x40100000
-CONFIG_SYS_MALLOC_LEN=0x102000
-CONFIG_NR_DRAM_BANKS=2
-CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_OFFSET=0x300000
-CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_SYS_I2C_MXC_I2C1=y
-CONFIG_SYS_I2C_MXC_I2C2=y
-CONFIG_SYS_I2C_MXC_I2C3=y
-CONFIG_SYS_I2C_MXC_I2C4=y
-CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
-CONFIG_FSL_LS_PPA=y
-CONFIG_ENV_ADDR=0x40300000
-CONFIG_AHCI=y
-CONFIG_LAYERSCAPE_NS_ACCESS=y
-CONFIG_PCIE1=y
-CONFIG_PCIE2=y
-CONFIG_PCIE3=y
-CONFIG_FSL_USE_PCA9547_MUX=y
-CONFIG_VID=y
-CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv"
-CONFIG_VOL_MONITOR_INA220=y
-CONFIG_VOL_MONITOR_IR36021_SET=y
-CONFIG_FSL_QIXIS=y
-CONFIG_SYS_MEMTEST_START=0x80000000
-CONFIG_SYS_MEMTEST_END=0x9fffffff
-CONFIG_DISTRO_DEFAULTS=y
-CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
-CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0
-CONFIG_REMAKE_ELF=y
-CONFIG_MP=y
-CONFIG_FIT_VERBOSE=y
-CONFIG_OF_BOARD_SETUP=y
-CONFIG_DYNAMIC_SYS_CLK_FREQ=y
-CONFIG_QSPI_BOOT=y
-CONFIG_BOOTDELAY=10
-CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 
earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi-0:2m(uboot),14m(free)"
-CONFIG_BOOTCOMMAND="run distro_bootcmd; run nor_bootcmd; env exists secureboot 
&& esbc_halt;;"
-CONFIG_ARCH_MISC_INIT=y
-CONFIG_MISC_INIT_R=y
-CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
-CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_GREPENV=y
-CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_GPT=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_PCI=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_CACHE=y
-CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.spi-0:2m(uboot),14m(free)"
-CONFIG_OF_CONTROL=y
-CONFIG_ENV_OVERWRITE=y
-CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_SATA=y
-CONFIG_SATA_CEVA=y
-CONFIG_FSL_CAAM=y
-CONFIG_DYNAMIC_DDR_CLK_FREQ=y
-CONFIG_DDR_ECC=y
-CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
-CONFIG_MPC8XXX_GPIO=y
-CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_EARLY_INIT=y
-CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
-CONFIG_SYS_I2C_EEPROM_ADDR=0x57
-CONFIG_FSL_ESDHC=y
-# CONFIG_SPI_FLASH_BAR is not set
-CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_SPI_FLASH_SST=y
-# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
-CONFIG_PHYLIB=y
-CONFIG_PHYLIB_10G=y
-CONFIG_PHY_REALTEK=y
-CONFIG_PHY_VITESSE=y
-CONFIG_E1000=y
-CONFIG_NVME_PCI=y
-CONFIG_PCI=y
-CONFIG_DM_PCI_COMPAT=y
-CONFIG_PCIE_LAYERSCAPE_RC=y
-CONFIG_PCIE_LAYERSCAPE_EP=y
-CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550_SERIAL=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_FSL_DSPI=y
-CONFIG_FSL_QSPI=y
-CONFIG_USB=y
-CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
diff --git a/configs/ls1046aqds_sdcard_ifc_defconfig 
b/configs/ls1046aqds_sdcard_ifc_defconfig
deleted file mode 100644
index 4d3c0580a1b..00000000000
--- a/configs/ls1046aqds_sdcard_ifc_defconfig
+++ /dev/null
@@ -1,139 +0,0 @@
-CONFIG_ARM=y
-CONFIG_COUNTER_FREQUENCY=25000000
-CONFIG_TARGET_LS1046AQDS=y
-CONFIG_TEXT_BASE=0x82000000
-CONFIG_SYS_MALLOC_LEN=0x102000
-CONFIG_SPL_LIBCOMMON_SUPPORT=y
-CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_NR_DRAM_BANKS=2
-CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_OFFSET=0x300000
-CONFIG_SYS_I2C_MXC_I2C1=y
-CONFIG_SYS_I2C_MXC_I2C2=y
-CONFIG_SYS_I2C_MXC_I2C3=y
-CONFIG_SYS_I2C_MXC_I2C4=y
-CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
-CONFIG_SPL_TEXT_BASE=0x10000000
-CONFIG_FSL_LS_PPA=y
-CONFIG_SPL_MMC=y
-CONFIG_SPL_SERIAL=y
-CONFIG_SPL_DRIVERS_MISC=y
-CONFIG_SPL=y
-CONFIG_AHCI=y
-CONFIG_LAYERSCAPE_NS_ACCESS=y
-CONFIG_PCIE1=y
-CONFIG_PCIE2=y
-CONFIG_PCIE3=y
-CONFIG_FSL_USE_PCA9547_MUX=y
-CONFIG_VID=y
-CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv"
-CONFIG_VOL_MONITOR_INA220=y
-CONFIG_VOL_MONITOR_IR36021_SET=y
-CONFIG_FSL_QIXIS=y
-# CONFIG_QIXIS_I2C_ACCESS is not set
-CONFIG_SYS_MEMTEST_START=0x80000000
-CONFIG_SYS_MEMTEST_END=0x9fffffff
-CONFIG_DISTRO_DEFAULTS=y
-CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
-CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0
-CONFIG_REMAKE_ELF=y
-CONFIG_SYS_MONITOR_LEN=1048576
-CONFIG_MP=y
-CONFIG_FIT_VERBOSE=y
-CONFIG_OF_BOARD_SETUP=y
-CONFIG_DYNAMIC_SYS_CLK_FREQ=y
-CONFIG_RAMBOOT_PBL=y
-CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1046aqds/ls1046aqds_pbi.cfg"
-CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1046aqds/ls1046aqds_rcw_sd_ifc.cfg"
-CONFIG_SD_BOOT=y
-CONFIG_BOOTDELAY=10
-CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 
earlycon=uart8250,mmio,0x21c0500 
mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
-CONFIG_BOOTCOMMAND="run distro_bootcmd; run sd_bootcmd; env exists secureboot 
&& esbc_halt;;"
-CONFIG_ARCH_MISC_INIT=y
-CONFIG_MISC_INIT_R=y
-CONFIG_SPL_MAX_SIZE=0x1f000
-CONFIG_SPL_PAD_TO=0x21000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x8f000000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
-CONFIG_SPL_FSL_PBL=y
-CONFIG_SPL_BOARD_INIT=y
-# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK=0x10020000
-CONFIG_SYS_SPL_MALLOC=y
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110
-CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR=y
-CONFIG_SPL_WATCHDOG=y
-CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
-CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_IMLS=y
-CONFIG_CMD_GREPENV=y
-CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_GPT=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
-CONFIG_CMD_PCI=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_CACHE=y
-CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
-# CONFIG_SPL_EFI_PARTITION is not set
-CONFIG_OF_CONTROL=y
-CONFIG_ENV_OVERWRITE=y
-CONFIG_ENV_IS_IN_MMC=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_SATA=y
-CONFIG_SATA_CEVA=y
-CONFIG_FSL_CAAM=y
-CONFIG_DYNAMIC_DDR_CLK_FREQ=y
-CONFIG_DDR_ECC=y
-CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
-CONFIG_MPC8XXX_GPIO=y
-CONFIG_DM_I2C=y
-CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
-CONFIG_SYS_I2C_EEPROM_ADDR=0x57
-CONFIG_FSL_ESDHC=y
-CONFIG_MTD=y
-CONFIG_MTD_NOR_FLASH=y
-CONFIG_FLASH_CFI_DRIVER=y
-CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
-CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
-CONFIG_SYS_FLASH_EMPTY_INFO=y
-CONFIG_SYS_FLASH_CFI=y
-CONFIG_SYS_FLASH_QUIET_TEST=y
-CONFIG_SYS_MAX_FLASH_SECT=1024
-CONFIG_SYS_MAX_FLASH_BANKS=2
-CONFIG_MTD_RAW_NAND=y
-CONFIG_NAND_FSL_IFC=y
-CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SF_DEFAULT_BUS=1
-CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_SPI_FLASH_SST=y
-CONFIG_PHYLIB=y
-CONFIG_PHYLIB_10G=y
-CONFIG_PHY_REALTEK=y
-CONFIG_PHY_VITESSE=y
-CONFIG_E1000=y
-CONFIG_NVME_PCI=y
-CONFIG_PCI=y
-CONFIG_DM_PCI_COMPAT=y
-CONFIG_PCIE_LAYERSCAPE_RC=y
-CONFIG_PCIE_LAYERSCAPE_EP=y
-CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550_SERIAL=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_FSL_DSPI=y
-CONFIG_USB=y
-CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
diff --git a/configs/ls1046aqds_sdcard_qspi_defconfig 
b/configs/ls1046aqds_sdcard_qspi_defconfig
deleted file mode 100644
index 480ab037953..00000000000
--- a/configs/ls1046aqds_sdcard_qspi_defconfig
+++ /dev/null
@@ -1,128 +0,0 @@
-CONFIG_ARM=y
-CONFIG_COUNTER_FREQUENCY=25000000
-CONFIG_TARGET_LS1046AQDS=y
-CONFIG_TEXT_BASE=0x82000000
-CONFIG_SYS_MALLOC_LEN=0x102000
-CONFIG_SPL_LIBCOMMON_SUPPORT=y
-CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_NR_DRAM_BANKS=2
-CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_OFFSET=0x300000
-CONFIG_SYS_I2C_MXC_I2C1=y
-CONFIG_SYS_I2C_MXC_I2C2=y
-CONFIG_SYS_I2C_MXC_I2C3=y
-CONFIG_SYS_I2C_MXC_I2C4=y
-CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
-CONFIG_SPL_TEXT_BASE=0x10000000
-CONFIG_FSL_LS_PPA=y
-CONFIG_SPL_MMC=y
-CONFIG_SPL_SERIAL=y
-CONFIG_SPL_DRIVERS_MISC=y
-CONFIG_SPL=y
-CONFIG_AHCI=y
-CONFIG_LAYERSCAPE_NS_ACCESS=y
-CONFIG_PCIE1=y
-CONFIG_PCIE2=y
-CONFIG_PCIE3=y
-CONFIG_FSL_USE_PCA9547_MUX=y
-CONFIG_VID=y
-CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv"
-CONFIG_VOL_MONITOR_INA220=y
-CONFIG_VOL_MONITOR_IR36021_SET=y
-CONFIG_FSL_QIXIS=y
-CONFIG_SYS_MEMTEST_START=0x80000000
-CONFIG_SYS_MEMTEST_END=0x9fffffff
-CONFIG_DISTRO_DEFAULTS=y
-CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
-CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0
-CONFIG_REMAKE_ELF=y
-CONFIG_SYS_MONITOR_LEN=1048576
-CONFIG_MP=y
-CONFIG_FIT_VERBOSE=y
-CONFIG_OF_BOARD_SETUP=y
-CONFIG_DYNAMIC_SYS_CLK_FREQ=y
-CONFIG_RAMBOOT_PBL=y
-CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1046aqds/ls1046aqds_pbi.cfg"
-CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1046aqds/ls1046aqds_rcw_sd_qspi.cfg"
-CONFIG_SD_BOOT=y
-CONFIG_SD_BOOT_QSPI=y
-CONFIG_BOOTDELAY=10
-CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 
earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi-0:2m(uboot),14m(free)"
-CONFIG_BOOTCOMMAND="run distro_bootcmd; run sd_bootcmd; env exists secureboot 
&& esbc_halt;;"
-CONFIG_ARCH_MISC_INIT=y
-CONFIG_MISC_INIT_R=y
-CONFIG_SPL_MAX_SIZE=0x1f000
-CONFIG_SPL_PAD_TO=0x21000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x8f000000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
-CONFIG_SPL_FSL_PBL=y
-CONFIG_SPL_BOARD_INIT=y
-# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK=0x10020000
-CONFIG_SYS_SPL_MALLOC=y
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110
-CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C=y
-CONFIG_SPL_MPC8XXX_INIT_DDR=y
-CONFIG_SPL_WATCHDOG=y
-CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
-CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_GREPENV=y
-CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_GPT=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_PCI=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_CACHE=y
-CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.spi-0:2m(uboot),14m(free)"
-# CONFIG_SPL_EFI_PARTITION is not set
-CONFIG_OF_CONTROL=y
-CONFIG_ENV_OVERWRITE=y
-CONFIG_ENV_IS_IN_MMC=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_SATA=y
-CONFIG_SATA_CEVA=y
-CONFIG_FSL_CAAM=y
-CONFIG_DYNAMIC_DDR_CLK_FREQ=y
-CONFIG_DDR_ECC=y
-CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
-CONFIG_MPC8XXX_GPIO=y
-CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_EARLY_INIT=y
-CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
-CONFIG_SYS_I2C_EEPROM_ADDR=0x57
-CONFIG_FSL_ESDHC=y
-# CONFIG_SPI_FLASH_BAR is not set
-CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_SPI_FLASH_SST=y
-# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
-CONFIG_PHYLIB=y
-CONFIG_PHYLIB_10G=y
-CONFIG_PHY_REALTEK=y
-CONFIG_PHY_VITESSE=y
-CONFIG_E1000=y
-CONFIG_NVME_PCI=y
-CONFIG_PCI=y
-CONFIG_DM_PCI_COMPAT=y
-CONFIG_PCIE_LAYERSCAPE_RC=y
-CONFIG_PCIE_LAYERSCAPE_EP=y
-CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550_SERIAL=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_FSL_DSPI=y
-CONFIG_FSL_QSPI=y
-CONFIG_USB=y
-CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
diff --git a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig 
b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig
deleted file mode 100644
index a0d57b19354..00000000000
--- a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig
+++ /dev/null
@@ -1,109 +0,0 @@
-CONFIG_ARM=y
-CONFIG_COUNTER_FREQUENCY=25000000
-CONFIG_TARGET_LS1046AQDS=y
-CONFIG_TFABOOT=y
-CONFIG_TEXT_BASE=0x82000000
-CONFIG_SYS_MALLOC_LEN=0x102000
-CONFIG_NR_DRAM_BANKS=2
-CONFIG_ENV_SIZE=0x2000
-CONFIG_SYS_I2C_MXC_I2C1=y
-CONFIG_SYS_I2C_MXC_I2C2=y
-CONFIG_SYS_I2C_MXC_I2C3=y
-CONFIG_SYS_I2C_MXC_I2C4=y
-CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
-CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
-CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y
-CONFIG_AHCI=y
-CONFIG_NXP_ESBC=y
-CONFIG_LAYERSCAPE_NS_ACCESS=y
-CONFIG_PCIE1=y
-CONFIG_PCIE2=y
-CONFIG_PCIE3=y
-CONFIG_FSL_USE_PCA9547_MUX=y
-CONFIG_VID=y
-CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv"
-CONFIG_VOL_MONITOR_INA220=y
-CONFIG_VOL_MONITOR_IR36021_SET=y
-CONFIG_FSL_QIXIS=y
-CONFIG_SYS_MEMTEST_START=0x80000000
-CONFIG_SYS_MEMTEST_END=0x9fffffff
-CONFIG_DISTRO_DEFAULTS=y
-CONFIG_REMAKE_ELF=y
-CONFIG_MP=y
-CONFIG_FIT_VERBOSE=y
-CONFIG_OF_BOARD_SETUP=y
-CONFIG_DYNAMIC_SYS_CLK_FREQ=y
-CONFIG_BOOTDELAY=10
-CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 
earlycon=uart8250,mmio,0x21c0500 
mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
-# CONFIG_USE_BOOTCOMMAND is not set
-CONFIG_MISC_INIT_R=y
-CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
-CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_IMLS=y
-CONFIG_CMD_GREPENV=y
-CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_GPT=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
-CONFIG_CMD_PCI=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_CACHE=y
-CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
-CONFIG_OF_CONTROL=y
-CONFIG_ENV_OVERWRITE=y
-CONFIG_SATA=y
-CONFIG_SATA_CEVA=y
-CONFIG_DYNAMIC_DDR_CLK_FREQ=y
-CONFIG_DDR_ECC=y
-CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
-CONFIG_MPC8XXX_GPIO=y
-CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_EARLY_INIT=y
-CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
-CONFIG_SYS_FSL_SEC_MON_BE=y
-CONFIG_SYS_I2C_EEPROM_ADDR=0x57
-CONFIG_FSL_ESDHC=y
-CONFIG_MTD=y
-CONFIG_MTD_NOR_FLASH=y
-CONFIG_FLASH_CFI_DRIVER=y
-CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
-CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
-CONFIG_SYS_FLASH_EMPTY_INFO=y
-CONFIG_SYS_FLASH_CFI=y
-CONFIG_SYS_FLASH_QUIET_TEST=y
-CONFIG_SYS_MAX_FLASH_SECT=1024
-CONFIG_SYS_MAX_FLASH_BANKS=2
-CONFIG_MTD_RAW_NAND=y
-CONFIG_NAND_FSL_IFC=y
-CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SF_DEFAULT_BUS=1
-CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_SPI_FLASH_SST=y
-CONFIG_PHYLIB=y
-CONFIG_PHYLIB_10G=y
-CONFIG_PHY_REALTEK=y
-CONFIG_PHY_VITESSE=y
-CONFIG_E1000=y
-CONFIG_NVME_PCI=y
-CONFIG_PCI=y
-CONFIG_DM_PCI_COMPAT=y
-CONFIG_PCIE_LAYERSCAPE_RC=y
-CONFIG_PCIE_LAYERSCAPE_EP=y
-CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550_SERIAL=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_FSL_DSPI=y
-CONFIG_USB=y
-CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
-CONFIG_RSA=y
diff --git a/configs/ls1046aqds_tfa_defconfig b/configs/ls1046aqds_tfa_defconfig
deleted file mode 100644
index e08af4d1a2c..00000000000
--- a/configs/ls1046aqds_tfa_defconfig
+++ /dev/null
@@ -1,119 +0,0 @@
-CONFIG_ARM=y
-CONFIG_COUNTER_FREQUENCY=25000000
-CONFIG_TARGET_LS1046AQDS=y
-CONFIG_TFABOOT=y
-CONFIG_TEXT_BASE=0x82000000
-CONFIG_SYS_MALLOC_LEN=0x102000
-CONFIG_NR_DRAM_BANKS=2
-CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_OFFSET=0x500000
-CONFIG_ENV_SECT_SIZE=0x20000
-CONFIG_SYS_I2C_MXC_I2C1=y
-CONFIG_SYS_I2C_MXC_I2C2=y
-CONFIG_SYS_I2C_MXC_I2C3=y
-CONFIG_SYS_I2C_MXC_I2C4=y
-CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
-CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
-CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y
-CONFIG_ENV_ADDR=0x60500000
-CONFIG_AHCI=y
-CONFIG_LAYERSCAPE_NS_ACCESS=y
-CONFIG_PCIE1=y
-CONFIG_PCIE2=y
-CONFIG_PCIE3=y
-CONFIG_FSL_USE_PCA9547_MUX=y
-CONFIG_VID=y
-CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv"
-CONFIG_VOL_MONITOR_INA220=y
-CONFIG_VOL_MONITOR_IR36021_SET=y
-CONFIG_FSL_QIXIS=y
-CONFIG_SYS_MEMTEST_START=0x80000000
-CONFIG_SYS_MEMTEST_END=0x9fffffff
-CONFIG_DISTRO_DEFAULTS=y
-CONFIG_REMAKE_ELF=y
-CONFIG_MP=y
-CONFIG_FIT_VERBOSE=y
-CONFIG_OF_BOARD_SETUP=y
-CONFIG_DYNAMIC_SYS_CLK_FREQ=y
-CONFIG_BOOTDELAY=10
-CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 
earlycon=uart8250,mmio,0x21c0500 
mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
-# CONFIG_USE_BOOTCOMMAND is not set
-CONFIG_ARCH_MISC_INIT=y
-CONFIG_MISC_INIT_R=y
-CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
-CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_IMLS=y
-CONFIG_CMD_GREPENV=y
-CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
-CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_GPT=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
-CONFIG_CMD_PCI=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_CACHE=y
-CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
-CONFIG_OF_CONTROL=y
-CONFIG_ENV_OVERWRITE=y
-CONFIG_ENV_IS_IN_FLASH=y
-CONFIG_ENV_IS_IN_MMC=y
-CONFIG_ENV_IS_IN_NAND=y
-CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_ENV_SPI_BUS=0
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_SATA=y
-CONFIG_SATA_CEVA=y
-CONFIG_FSL_CAAM=y
-CONFIG_DYNAMIC_DDR_CLK_FREQ=y
-CONFIG_DDR_ECC=y
-CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
-CONFIG_MPC8XXX_GPIO=y
-CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_EARLY_INIT=y
-CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
-CONFIG_SYS_I2C_EEPROM_ADDR=0x57
-CONFIG_FSL_ESDHC=y
-CONFIG_MTD=y
-CONFIG_MTD_NOR_FLASH=y
-CONFIG_FLASH_CFI_DRIVER=y
-CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
-CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
-CONFIG_SYS_FLASH_EMPTY_INFO=y
-CONFIG_SYS_FLASH_CFI=y
-CONFIG_SYS_FLASH_QUIET_TEST=y
-CONFIG_SYS_MAX_FLASH_SECT=1024
-CONFIG_SYS_MAX_FLASH_BANKS=2
-CONFIG_MTD_RAW_NAND=y
-CONFIG_NAND_FSL_IFC=y
-CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SF_DEFAULT_BUS=1
-# CONFIG_SPI_FLASH_BAR is not set
-CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_SPI_FLASH_SST=y
-CONFIG_PHYLIB=y
-CONFIG_PHYLIB_10G=y
-CONFIG_PHY_REALTEK=y
-CONFIG_PHY_VITESSE=y
-CONFIG_E1000=y
-CONFIG_NVME_PCI=y
-CONFIG_PCI=y
-CONFIG_DM_PCI_COMPAT=y
-CONFIG_PCIE_LAYERSCAPE_RC=y
-CONFIG_PCIE_LAYERSCAPE_EP=y
-CONFIG_DM_SCSI=y
-CONFIG_SYS_NS16550_SERIAL=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_FSL_DSPI=y
-CONFIG_FSL_QSPI=y
-CONFIG_USB=y
-CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
-- 
2.36.0


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