On 2/14/23 13:04, Jonas Karlman wrote:
Hi Eugen,

On 2023-02-14 11:26, Eugen Hristev wrote:
On 2/6/23 14:14, Jonas Karlman wrote:
Hi Eugen,
On 2023-02-06 12:59, Eugen Hristev wrote:
ROCK 5B is a Rockchip RK3588 based SBC (Single Board Computer) by Radxa.

There are tree variants depending on the DRAM size : 4G, 8G and 16G.

Specification:

      Rockchip Rk3588 SoC
      4x ARM Cortex-A76, 4x ARM Cortex-A55
      4/8/16GB memory LPDDR4x
      Mali G610MC4 GPU
      MIPI CSI 2 multiple lanes connector
      eMMC module connector
      uSD slot (up to 128GB)
      2x USB 2.0, 2x USB 3.0
      2x HDMI output, 1x HDMI input
      Ethernet port
      40-pin IO header including UART, SPI, I2C and 5V DC power in
      USB PD over USB Type-C
      Size: 85mm x 54mm

Signed-off-by: Eugen Hristev <eugen.hris...@collabora.com>
---

Hi,

This patch is based on top of Jagan's series
https://lists.denx.de/pipermail/u-boot/2023-January/506156.html>>>>
And fixes from Jonas Karlman which I cherrypicked
The DT is identical with current linux-next.

One thing which is not working as expected is the DRAM size detection,
the rock5b has 16 GiB but Uboot only reports 4 GiB.

The DRAM driver used is the one from Jagan's series.

Jagan, maybe you can tell me how is this driver working on your Edgeble board
and how the detection works there for you ?

With the SDRAM series at [1] it should hopefylly detect the correct ram size.
I will send a v2 rebased on u-boot master later today, a CONFIG_ to CFG_ change.

[1] 
https://patchwork.ozlabs.org/project/uboot/cover/20230116161459.1307591-1-jo...@kwiboo.se/>>>
Regards,
Jonas


Hi Jonas, Jagan,

Have you tested the rk3588 with 16 GiB of DRAM ?
If the DRAM bank discovered is [0, 4 0000 0000] , U-boot will reserve an
area for trust and for optee, and place two areas in kernel's DTB :
[20 0000 , f000 0000] and [1 0000 0000 , 4 0000 0000]

And this cause the kernel to crash very early.

Downstream U-boot appears to get the banks from ATAGs and has three areas:

[ 20 0000,  f000 0000 ] (size: 0xefe00000)
[1 0000 0000 , 3 fc00 0000 ] (size: 0x2fc000000)
[3 fc50 0000 , 3 fff0 0000 ] (size: 0x03a00000)

So maybe you have any idea why the gap at 3 fc00 0000 until 3 fc50 0000
and the gap at 3 fff0 0000 up to 4 0000 0000 ?

I have only tested running u-boot and not linux on my rk3588 8GB board.

The TRM does not mention any address mapping within [1 0000 0000, 9 0000 0000].
Also try without TEE, the area reserved by vendor u-boot may be something optee 
will use.
U-Boot mainline does not reserve a memory area when TEE is used.


Hi Jonas,

Yes I noticed the same in the TRM.
In my u-boot.itb there are 4 ATFs :

  Firmware:     atf-1
  FDT:          fdt-1
  Loadables:    u-boot
                atf-2
                atf-3


It appears that only BL31 is run when starting up the board, and it's being run before u-boot proper, and after the SPL. However the DRAM banks and the gap at [3 fc50 0000] comes from an earlier stage, I assume ddr.bin, as the SPL does not use atags right ? So it should not be the area reserved by optee, but this area has another purpose.
Maybe Kever you have any knowledge about this area ?

Thanks,
Eugen

Regards,
Jonas


Thanks,

Eugen



[snip]


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