On 3/21/23 9:10 AM, Hari Nagalla wrote:
Signed-off-by: Apurva Nandan <a-nan...@ti.com>
Signed-off-by: Bryan Bratloff <b...@ti.com>
Signed-off-by: Nishant Menon <n...@ti.com>
Signed-off-by: Hari Nagalla <hnaga...@ti.com>
---
  arch/arm/mach-k3/Kconfig                      |  16 +-
  arch/arm/mach-k3/Makefile                     |   2 +
  arch/arm/mach-k3/arm64-mmu.c                  |  41 +++
  arch/arm/mach-k3/include/mach/hardware.h      |   4 +
  .../mach-k3/include/mach/j784s4_hardware.h    |  41 +++
  arch/arm/mach-k3/include/mach/j784s4_spl.h    |  46 +++
  arch/arm/mach-k3/include/mach/spl.h           |   6 +-
  arch/arm/mach-k3/j784s4/Makefile              |   5 +
  arch/arm/mach-k3/j784s4/dev-data.c            |  97 ++++++
  arch/arm/mach-k3/j784s4_init.c                | 319 ++++++++++++++++++
  board/ti/j784s4/j784s4.env                    | 108 ++++++
  include/configs/j784s4_evm.h                  |  49 +++
  12 files changed, 727 insertions(+), 7 deletions(-)
  create mode 100644 arch/arm/mach-k3/include/mach/j784s4_hardware.h
  create mode 100644 arch/arm/mach-k3/include/mach/j784s4_spl.h
  create mode 100644 arch/arm/mach-k3/j784s4/Makefile
  create mode 100644 arch/arm/mach-k3/j784s4/dev-data.c
  create mode 100644 arch/arm/mach-k3/j784s4_init.c
  create mode 100644 board/ti/j784s4/j784s4.env
  create mode 100644 include/configs/j784s4_evm.h

diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig
index a8c3a593d5..3a9be0a590 100644
--- a/arch/arm/mach-k3/Kconfig
+++ b/arch/arm/mach-k3/Kconfig
@@ -22,6 +22,9 @@ config SOC_K3_AM625
  config SOC_K3_AM62A7
        bool "TI's K3 based AM62A7 SoC Family Support"
+config SOC_K3_J784S4
+       bool "TI's K3 based J784S4 SoC Family Support"
+
  endchoice
config SYS_SOC
@@ -30,7 +33,7 @@ config SYS_SOC
  config SYS_K3_NON_SECURE_MSRAM_SIZE
        hex
        default 0x80000 if SOC_K3_AM654
-       default 0x100000 if SOC_K3_J721E || SOC_K3_J721S2
+       default 0x100000 if SOC_K3_J721E || SOC_K3_J721S2 || SOC_K3_J784S4
        default 0x1c0000 if SOC_K3_AM642
        default 0x3c000 if SOC_K3_AM625 || SOC_K3_AM62A7
        help
@@ -42,7 +45,7 @@ config SYS_K3_NON_SECURE_MSRAM_SIZE
  config SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE
        hex
        default 0x58000 if SOC_K3_AM654
-       default 0xc0000 if SOC_K3_J721E || SOC_K3_J721S2
+       default 0xc0000 if SOC_K3_J721E || SOC_K3_J721S2 || SOC_K3_J784S4
        default 0x180000 if SOC_K3_AM642
        default 0x38000 if SOC_K3_AM625 || SOC_K3_AM62A7
        help
@@ -52,14 +55,14 @@ config SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE
  config SYS_K3_MCU_SCRATCHPAD_BASE
        hex
        default 0x40280000 if SOC_K3_AM654
-       default 0x40280000 if SOC_K3_J721E || SOC_K3_J721S2
+       default 0x40280000 if SOC_K3_J721E || SOC_K3_J721S2 || SOC_K3_J784S4
        help
          Describes the base address of MCU Scratchpad RAM.
config SYS_K3_MCU_SCRATCHPAD_SIZE
        hex
        default 0x200 if SOC_K3_AM654
-       default 0x200 if SOC_K3_J721E || SOC_K3_J721S2
+       default 0x200 if SOC_K3_J721E || SOC_K3_J721S2 || SOC_K3_J784S4
        help
          Describes the size of MCU Scratchpad RAM.
@@ -67,7 +70,7 @@ config SYS_K3_BOOT_PARAM_TABLE_INDEX
        hex
        default 0x41c7fbfc if SOC_K3_AM654
        default 0x41cffbfc if SOC_K3_J721E
-       default 0x41cfdbfc if SOC_K3_J721S2
+       default 0x41cfdbfc if SOC_K3_J721S2 || SOC_K3_J784S4
        default 0x701bebfc if SOC_K3_AM642
        default 0x43c3f290 if SOC_K3_AM625
        default 0x43c3f290 if SOC_K3_AM62A7 && CPU_V7R
@@ -172,7 +175,7 @@ config K3_ATF_LOAD_ADDR
config K3_DM_FW
        bool "Separate DM firmware image"
-       depends on SPL && CPU_V7R && (SOC_K3_J721E || SOC_K3_J721S2 || SOC_K3_AM625 || 
SOC_K3_AM62A7) && !CLK_TI_SCI && !TI_SCI_POWER_DOMAIN
+       depends on SPL && CPU_V7R && (SOC_K3_J721E || SOC_K3_J721S2 || SOC_K3_AM625 || 
SOC_K3_AM62A7 || SOC_K3_J784S4) && !CLK_TI_SCI && !TI_SCI_POWER_DOMAIN
        default y
        help
          Enabling this will indicate that the system has separate DM
@@ -194,4 +197,5 @@ source "board/ti/am62ax/Kconfig"
  source "board/ti/j721e/Kconfig"
  source "board/siemens/iot2050/Kconfig"
  source "board/ti/j721s2/Kconfig"
+source "board/ti/j784s4/Kconfig"
  endif
diff --git a/arch/arm/mach-k3/Makefile b/arch/arm/mach-k3/Makefile
index b5bc236781..14cf85ad38 100644
--- a/arch/arm/mach-k3/Makefile
+++ b/arch/arm/mach-k3/Makefile
@@ -7,6 +7,7 @@ obj-$(CONFIG_SOC_K3_J721E) += j721e/ j7200/
  obj-$(CONFIG_SOC_K3_J721S2) += j721s2/
  obj-$(CONFIG_SOC_K3_AM625) += am62x/
  obj-$(CONFIG_SOC_K3_AM62A7) += am62ax/
+obj-$(CONFIG_SOC_K3_J784S4) += j784s4/
  obj-$(CONFIG_ARM64) += arm64-mmu.o
  obj-$(CONFIG_CPU_V7R) += r5_mpu.o lowlevel_init.o
  obj-$(CONFIG_ARM64) += cache.o
@@ -17,6 +18,7 @@ obj-$(CONFIG_SOC_K3_J721S2) += j721s2_init.o
  obj-$(CONFIG_SOC_K3_AM642) += am642_init.o
  obj-$(CONFIG_SOC_K3_AM625) += am625_init.o
  obj-$(CONFIG_SOC_K3_AM62A7) += am62a7_init.o
+obj-$(CONFIG_SOC_K3_J784S4) += j784s4_init.o
  obj-$(CONFIG_K3_LOAD_SYSFW) += sysfw-loader.o
  endif
  obj-y += common.o security.o
diff --git a/arch/arm/mach-k3/arm64-mmu.c b/arch/arm/mach-k3/arm64-mmu.c
index 88687c2d09..610ff19696 100644
--- a/arch/arm/mach-k3/arm64-mmu.c
+++ b/arch/arm/mach-k3/arm64-mmu.c
@@ -264,3 +264,44 @@ struct mm_region am64_mem_map[NR_MMU_REGIONS] = {
struct mm_region *mem_map = am64_mem_map;
  #endif /* CONFIG_SOC_K3_AM642 || CONFIG_SOC_K3_AM625 || CONFIG_SOC_K3_AM62A7 
*/
+
+#if defined(CONFIG_SOC_K3_J784S4)
+#define NR_MMU_REGIONS (CONFIG_NR_DRAM_BANKS + 3)
+
+/* ToDo: Add 64bit IO */


The second block of IO mem at 0x500000000UL is the 64bit IO, this TODO is not 
needed.

+struct mm_region j784s4_mem_map[NR_MMU_REGIONS] = {
+       {
+               .virt = 0x0UL,
+               .phys = 0x0UL,
+               .size = 0x80000000UL,
+               .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+                        PTE_BLOCK_NON_SHARE |
+                        PTE_BLOCK_PXN | PTE_BLOCK_UXN
+       }, {
+               .virt = 0x80000000UL,
+               .phys = 0x80000000UL,
+               .size = 0x80000000UL,
+               .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+                        PTE_BLOCK_INNER_SHARE
+       }, {
+               .virt = 0x880000000UL,
+               .phys = 0x880000000UL,
+               .size = 0x80000000UL,
+               .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+                        PTE_BLOCK_INNER_SHARE
+       }, {
+               .virt = 0x500000000UL,
+               .phys = 0x500000000UL,
+               .size = 0x400000000UL,
+               .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+                        PTE_BLOCK_NON_SHARE |
+                        PTE_BLOCK_PXN | PTE_BLOCK_UXN
+       }, {
+               /* List terminator */
+               0,
+       }
+};
+
+struct mm_region *mem_map = j784s4_mem_map;
+
+#endif /* CONFIG_SOC_K3_J784S4 */
diff --git a/arch/arm/mach-k3/include/mach/hardware.h 
b/arch/arm/mach-k3/include/mach/hardware.h
index 2c60ef8543..77f36c6707 100644
--- a/arch/arm/mach-k3/include/mach/hardware.h
+++ b/arch/arm/mach-k3/include/mach/hardware.h
@@ -30,6 +30,10 @@
  #include "am62a_hardware.h"
  #endif
+#ifdef CONFIG_SOC_K3_J784S4
+#include "j784s4_hardware.h"
+#endif
+
  /* Assuming these addresses and definitions stay common across K3 devices */
  #define CTRLMMR_WKUP_JTAG_ID  (WKUP_CTRL_MMR0_BASE + 0x14)
  #define JTAG_ID_VARIANT_SHIFT 28
diff --git a/arch/arm/mach-k3/include/mach/j784s4_hardware.h 
b/arch/arm/mach-k3/include/mach/j784s4_hardware.h
new file mode 100644
index 0000000000..afcf39c45d
--- /dev/null
+++ b/arch/arm/mach-k3/include/mach/j784s4_hardware.h
@@ -0,0 +1,41 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * K3: J784S4 SoC definitions, structures etc.
+ *
+ * (C) Copyright (C) 2022 Texas Instruments Incorporated - http://www.ti.com/

Why two (C)? And the address should have https not http. Fix this everywhere in 
this series.

Andrew

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