From: Samuel Holland <sam...@sholland.org>

The HDMI PHY depends on the HVCC supply being enabled. So far we have
relied on it being enabled by an earlier firmware stage (SPL or TF-A).
Attempt to enable the regulator here, so we can remove that dependency.

Signed-off-by: Samuel Holland <sam...@sholland.org>
Signed-off-by: Andre Przywara <andre.przyw...@arm.com>
---
 drivers/video/sunxi/sunxi_dw_hdmi.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/video/sunxi/sunxi_dw_hdmi.c 
b/drivers/video/sunxi/sunxi_dw_hdmi.c
index ef18d1f281f..0324a050d03 100644
--- a/drivers/video/sunxi/sunxi_dw_hdmi.c
+++ b/drivers/video/sunxi/sunxi_dw_hdmi.c
@@ -19,11 +19,13 @@
 #include <asm/arch/lcdc.h>
 #include <linux/bitops.h>
 #include <linux/delay.h>
+#include <power/regulator.h>
 
 struct sunxi_dw_hdmi_priv {
        struct dw_hdmi hdmi;
        struct reset_ctl_bulk resets;
        struct clk_bulk clocks;
+       struct udevice *hvcc;
 };
 
 struct sunxi_hdmi_phy {
@@ -333,6 +335,9 @@ static int sunxi_dw_hdmi_probe(struct udevice *dev)
                (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
        int ret;
 
+       if (priv->hvcc)
+               regulator_set_enable(priv->hvcc, true);
+
        /* Set pll3 to 297 MHz */
        clock_set_pll3(297000000);
 
@@ -384,6 +389,10 @@ static int sunxi_dw_hdmi_of_to_plat(struct udevice *dev)
        if (ret)
                return ret;
 
+       ret = device_get_supply_regulator(dev, "hvcc-supply", &priv->hvcc);
+       if (ret)
+               priv->hvcc = NULL;
+
        return 0;
 }
 
-- 
2.35.7

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