On Tue, May 30, 2023 at 3:46 PM Adam Ford <[email protected]> wrote: > > There are some newer clocks added to the kernel recently, > so to fix prepare for resycing the device trees, update > the clock list. Since there are some minor changes to > the USB clocks, update which USB clocks are enabled > to match with the upstream kernel as well. > > Signed-off-by: Adam Ford <[email protected]> > > diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c > index 09bef596f2..a21a3ce34b 100644 > --- a/drivers/clk/imx/clk-imx8mp.c > +++ b/drivers/clk/imx/clk-imx8mp.c > @@ -337,7 +337,8 @@ static int imx8mp_clk_probe(struct udevice *dev) > clk_dm(IMX8MP_CLK_UART2_ROOT, imx_clk_gate4("uart2_root_clk", > "uart2", base + 0x44a0, 0)); > clk_dm(IMX8MP_CLK_UART3_ROOT, imx_clk_gate4("uart3_root_clk", > "uart3", base + 0x44b0, 0)); > clk_dm(IMX8MP_CLK_UART4_ROOT, imx_clk_gate4("uart4_root_clk", > "uart4", base + 0x44c0, 0)); > - clk_dm(IMX8MP_CLK_USB_ROOT, imx_clk_gate4("usb_root_clk", > "usb_core_ref", base + 0x44d0, 0)); > + clk_dm(IMX8MP_CLK_USB_ROOT, imx_clk_gate2("usb_root_clk", "hsio_axi", > base + 0x44d0, 0)); > + clk_dm(IMX8MP_CLK_USB_SUSP, imx_clk_gate2("usb_suspend_clk", > "clock-osc-24m", base + 0x44d0, 0)); > clk_dm(IMX8MP_CLK_USB_PHY_ROOT, imx_clk_gate4("usb_phy_root_clk", > "usb_phy_ref", base + 0x44f0, 0)); > clk_dm(IMX8MP_CLK_USDHC1_ROOT, imx_clk_gate4("usdhc1_root_clk", > "usdhc1", base + 0x4510, 0)); > clk_dm(IMX8MP_CLK_USDHC2_ROOT, imx_clk_gate4("usdhc2_root_clk", > "usdhc2", base + 0x4520, 0)); > diff --git a/include/dt-bindings/clock/imx8mp-clock.h > b/include/dt-bindings/clock/imx8mp-clock.h > index 9d5cc2ddde..3f28ce685f 100644 > --- a/include/dt-bindings/clock/imx8mp-clock.h > +++ b/include/dt-bindings/clock/imx8mp-clock.h > @@ -324,8 +324,18 @@ > #define IMX8MP_CLK_CLKOUT2_SEL 317 > #define IMX8MP_CLK_CLKOUT2_DIV 318 > #define IMX8MP_CLK_CLKOUT2 319 > - > -#define IMX8MP_CLK_END 320 > +#define IMX8MP_CLK_USB_SUSP 320 > +#define IMX8MP_CLK_AUDIO_AHB_ROOT IMX8MP_CLK_AUDIO_ROOT > +#define IMX8MP_CLK_AUDIO_AXI_ROOT 321 > +#define IMX8MP_CLK_SAI1_ROOT 322 > +#define IMX8MP_CLK_SAI2_ROOT 323 > +#define IMX8MP_CLK_SAI3_ROOT 324 > +#define IMX8MP_CLK_SAI5_ROOT 325 > +#define IMX8MP_CLK_SAI6_ROOT 326 > +#define IMX8MP_CLK_SAI7_ROOT 327 > +#define IMX8MP_CLK_PDM_ROOT 328 > +#define IMX8MP_CLK_MEDIA_LDB_ROOT 329 > +#define IMX8MP_CLK_END 330 > > #define IMX8MP_CLK_AUDIOMIX_SAI1_IPG 0 > #define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1 1 > -- > 2.39.2 >
Adam, This series does update the imx8mp.dtsi as well as provide functioning USB for me on imx8mp-venice-gw74xx. For both: Tested-by: Tim Harvey <[email protected]> #imx8mp-venice-gw74xx I do still see a clk already disabled message on usb stop (which was there before also but I believe the sync of the imx8mm.dtsi resolved the one on imx8mm). I'm curious if you see this as well: u-boot=> usb start && usb tree starting USB... Bus usb@38200000: Register 2000140 NbrPorts 2 Starting the controller USB XHCI 1.10 scanning bus usb@38200000 for devices... 4 USB Device(s) found scanning usb for storage devices... 0 Storage Device(s) found USB device tree: 1 Hub (5 Gb/s, 0mA) | U-Boot XHCI Host Controller | +-2 Hub (480 Mb/s, 0mA) | | Microchip Tech USB2744 | | | +-4 Vendor specific (480 Mb/s, 0mA) | Microchip Tech Hub Controller | +-3 Hub (5 Gb/s, 0mA) Microchip Tech USB5744 u-boot=> usb stop stopping USB.. clk usb_phy_root_clk already disabled Also, I assume your Type-C ports on the imx8mp-beacon-kit do not work yet due to no U-Boot driver for usb-c-connector, nxp,ptn5110, ti,hd3ss3220? Best Regards, Tim
