RK3328 u2phy has assigned-clock-rates on USB480M, return zero for them since the default rates will work fine.
Cc: Lukasz Majewski <[email protected]> Cc: Sean Anderson <[email protected]> Signed-off-by: Jagan Teki <[email protected]> --- drivers/clk/rockchip/clk_rk3328.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c index 969b7a8581..0e9b506890 100644 --- a/drivers/clk/rockchip/clk_rk3328.c +++ b/drivers/clk/rockchip/clk_rk3328.c @@ -681,6 +681,7 @@ static ulong rk3328_clk_set_rate(struct clk *clk, ulong rate) case ACLK_GMAC: case PCLK_GMAC: case SCLK_USB3OTG_SUSPEND: + case USB480M: return 0; default: return -ENOENT; -- 2.25.1
