On 7/10/23 15:02, Taedcke, Christian wrote:
Am 10.07.2023 um 13:41 schrieb Michal Simek:
On 6/27/23 11:04, [email protected] wrote:
From: Christian Taedcke <[email protected]>
This way custom logic can be implemented per board after the fpga
image is uploaded.
What do you want to do there?
I have 2 use-cases for this:
1. Clear the RAM which contained the bitstream (memset to zero). This
should happen independed of the result of the upload operation.
Is this some "secure-boot" related item ?
2. Control a LED based on the upload result. So in case the upload
failed, i want to enable some error LED.
One issue is that the return values of spl_fit_load_fpga() or
spl_fit_upload_fpga() are not evaluated in common/spl
/spl_fit.c. So this error is not propagated to higher layers.
I my use-case uploading the bitstream is mandatory before starting u-boot.
I expect Simon won't like that it is another weak function.
I did not find another way to implement the above use-cases. Maybe i
missed something.
Based on the above, probably make a weak wrapper around the fpga_load()
call, make it call fpga_load() by default and override it in some board
specific manner if needed.
