Move the function to setup video memory before page table reservation so that framebuffer memory gets reserved from the end of RAM.
This is as per the new policy being discussed for passing blobs where each of the reserved areas for bloblists to be passed need to be reserved at the end of RAM. This is to enable the next stage to directly skip the pre-reserved area from previous stage without having to making any gaps/holes to accomodate those regions which was the case if previous stage reserved region say somewhere in the middle and not at the end of RAM. Suggested-by: Simon Glass <[email protected]> Signed-off-by: Devarsh Thakkar <[email protected]> --- arch/arm/mach-k3/common.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c index cc755dd1bf..3978b9ccca 100644 --- a/arch/arm/mach-k3/common.c +++ b/arch/arm/mach-k3/common.c @@ -27,6 +27,7 @@ #include <env.h> #include <elf.h> #include <soc.h> +#include <video.h> #if IS_ENABLED(CONFIG_SYS_K3_SPL_ATF) enum { @@ -522,6 +523,24 @@ void remove_fwl_configs(struct fwl_data *fwl_data, size_t fwl_data_size) } } +static int video_setup(void) +{ + if (CONFIG_IS_ENABLED(VIDEO)) { + ulong addr; + int ret; + + addr = gd->relocaddr; + ret = video_reserve(&addr); + if (ret) + return ret; + debug("Reserving %luk for video at: %08lx\n", + ((unsigned long)gd->relocaddr - addr) >> 10, addr); + gd->relocaddr = addr; + } + + return 0; +} + void spl_enable_dcache(void) { #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) @@ -537,6 +556,8 @@ void spl_enable_dcache(void) if (ram_top >= 0x100000000) ram_top = (phys_addr_t) 0x100000000; + gd->relocaddr = ram_top; + video_setup(); gd->arch.tlb_addr = ram_top - gd->arch.tlb_size; gd->arch.tlb_addr &= ~(0x10000 - 1); debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr, -- 2.34.1
