On 2023-12-17 12:40, Stefan Nagy wrote:
Am Freitag, dem 15.12.2023 um 19:26 +0100 schrieb Dragan Simic:
On 2023-12-15 15:00, Stefan Nagy wrote:
> The ROCK Pi 4A/B/C boards come with a 32 Mbit SPI NOR flash chip
> (XTX Technology Limited XT25F32).
>
> Sync the devicetrees from Linux to enable spi1 and add a device
> node for the NOR flash chip. In the board's defconfig files enable
> the Rockchip SPI driver, add XTX SPI flash support and set the
> SPI flash default bus identifier.
>
> This patch has been tested on ROCK Pi 4A.
>
> Signed-off-by: Stefan Nagy <stefan.n...@ixypsilon.net>
> ---
> arch/arm/dts/rk3399-rock-pi-4a.dts | 10 ++++++++++
> arch/arm/dts/rk3399-rock-pi-4c.dts | 10 ++++++++++
> configs/rock-pi-4-rk3399_defconfig | 3 +++
> configs/rock-pi-4c-rk3399_defconfig | 3 +++
> 4 files changed, 26 insertions(+)
>
> diff --git a/arch/arm/dts/rk3399-rock-pi-4a.dts
> b/arch/arm/dts/rk3399-rock-pi-4a.dts
> index 931334aa..d5df8939 100644
> --- a/arch/arm/dts/rk3399-rock-pi-4a.dts
> +++ b/arch/arm/dts/rk3399-rock-pi-4a.dts
> @@ -12,3 +12,13 @@
> model = "Radxa ROCK Pi 4A";
> compatible = "radxa,rockpi4a", "radxa,rockpi4",
> "rockchip,rk3399";
> };
> +
> +&spi1 {
> + status = "okay";
> +
> + flash@0 {
> + compatible = "jedec,spi-nor";
> + reg = <0>;
> + spi-max-frequency = <10000000>;
> + };
> +};
> diff --git a/arch/arm/dts/rk3399-rock-pi-4c.dts
> b/arch/arm/dts/rk3399-rock-pi-4c.dts
> index d32efab7..de2ebe4c 100644
> --- a/arch/arm/dts/rk3399-rock-pi-4c.dts
> +++ b/arch/arm/dts/rk3399-rock-pi-4c.dts
> @@ -43,6 +43,16 @@
> hp-det-gpio = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>;
> };
>
> +&spi1 {
> + status = "okay";
> +
> + flash@0 {
> + compatible = "jedec,spi-nor";
> + reg = <0>;
> + spi-max-frequency = <10000000>;
> + };
> +};
> +
> &uart0 {
> status = "okay";
>
> diff --git a/configs/rock-pi-4-rk3399_defconfig
> b/configs/rock-pi-4-rk3399_defconfig
> index 84e0dcf0..c45a8c04 100644
> --- a/configs/rock-pi-4-rk3399_defconfig
> +++ b/configs/rock-pi-4-rk3399_defconfig
> @@ -61,6 +61,8 @@ CONFIG_MMC_DW_ROCKCHIP=y
> CONFIG_MMC_SDHCI=y
> CONFIG_MMC_SDHCI_SDMA=y
> CONFIG_MMC_SDHCI_ROCKCHIP=y
> +CONFIG_SF_DEFAULT_BUS=1
> +CONFIG_SPI_FLASH_XTX=y
> CONFIG_ETH_DESIGNWARE=y
> CONFIG_GMAC_ROCKCHIP=y
> CONFIG_NVME_PCI=y
> @@ -74,6 +76,7 @@ CONFIG_RAM_ROCKCHIP_LPDDR4=y
> CONFIG_BAUDRATE=1500000
> CONFIG_DEBUG_UART_SHIFT=2
> CONFIG_SYS_NS16550_MEM32=y
> +CONFIG_ROCKCHIP_SPI=y
> CONFIG_SYSRESET=y
> CONFIG_USB=y
> CONFIG_USB_XHCI_HCD=y
> diff --git a/configs/rock-pi-4c-rk3399_defconfig
> b/configs/rock-pi-4c-rk3399_defconfig
> index 5c9fb147..1ca19b4e 100644
> --- a/configs/rock-pi-4c-rk3399_defconfig
> +++ b/configs/rock-pi-4c-rk3399_defconfig
> @@ -58,6 +58,8 @@ CONFIG_MMC_DW=y
> CONFIG_MMC_DW_ROCKCHIP=y
> CONFIG_MMC_SDHCI=y
> CONFIG_MMC_SDHCI_ROCKCHIP=y
> +CONFIG_SF_DEFAULT_BUS=1
> +CONFIG_SPI_FLASH_XTX=y
> CONFIG_ETH_DESIGNWARE=y
> CONFIG_GMAC_ROCKCHIP=y
> CONFIG_NVME_PCI=y
> @@ -71,6 +73,7 @@ CONFIG_RAM_ROCKCHIP_LPDDR4=y
> CONFIG_BAUDRATE=1500000
> CONFIG_DEBUG_UART_SHIFT=2
> CONFIG_SYS_NS16550_MEM32=y
> +CONFIG_ROCKCHIP_SPI=y
> CONFIG_SYSRESET=y
> CONFIG_USB=y
> CONFIG_USB_XHCI_HCD=y
Perhaps it would be better to wait a bit until your patch for the
Linux
kernel [1] is accepted, and then have the updated spi-max-frequency
values synced back to U-Boot in the v2 of this patch.
[1]
https://lore.kernel.org/linux-rockchip/4fce0de996d6cc3056d972cd3fc3f...@manjaro.org/T/#m0621f671c597a4c0138b27bfc6fa3a16f82b721f
Yes, you are right. I'll try to be a bit more patient and send a v2 of
this as soon as my patch for the kernel is accepted.
Thanks, I'm glad you agree.
