Add BSEC support to STM32MP25 SoC family with SoC information: - RPN = Device part number (BSEC_OTP_DATA9) - PKG = package data register (Bits 2:0 of BSEC_OTP_DATA122)
Reviewed-by: Patrice Chotard <[email protected]> Signed-off-by: Patrick Delaunay <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]> --- (no changes since v1) arch/arm/dts/stm32mp25-u-boot.dtsi | 4 ++++ arch/arm/dts/stm32mp251.dtsi | 16 ++++++++++++++++ 2 files changed, 20 insertions(+) diff --git a/arch/arm/dts/stm32mp25-u-boot.dtsi b/arch/arm/dts/stm32mp25-u-boot.dtsi index f4f26add2a41..0c8e95b34163 100644 --- a/arch/arm/dts/stm32mp25-u-boot.dtsi +++ b/arch/arm/dts/stm32mp25-u-boot.dtsi @@ -37,6 +37,10 @@ }; }; +&bsec { + bootph-all; +}; + &gpioa { bootph-all; }; diff --git a/arch/arm/dts/stm32mp251.dtsi b/arch/arm/dts/stm32mp251.dtsi index cf2f28dc1582..44eb664fb510 100644 --- a/arch/arm/dts/stm32mp251.dtsi +++ b/arch/arm/dts/stm32mp251.dtsi @@ -127,6 +127,22 @@ }; }; + bsec: efuse@44000000 { + compatible = "st,stm32mp25-bsec"; + reg = <0x44000000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + + part_number_otp@24 { + reg = <0x24 0x4>; + }; + + package_otp@1e8 { + reg = <0x1e8 0x1>; + bits = <0 3>; + }; + }; + syscfg: syscon@44230000 { compatible = "st,stm32mp25-syscfg", "syscon"; reg = <0x44230000 0x10000>; -- 2.25.1
