On 1/29/24 08:46, Michal Simek wrote:
Describe 25Mhz fixed oscilator which is providing clock for PL based
ethernet IPs. Physicially it is one chip but it is described as 2 fixed
clock to be aligned with other SOM versions which were using integrated
clock generators where clocks could be adjusted via i2c (si5332 chips).
Signed-off-by: Michal Simek <[email protected]>
---
arch/arm/dts/zynqmp-sck-kd-g-revA.dtso | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso
b/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso
index 766f78303eee..b3fc17cbd577 100644
--- a/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso
+++ b/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso
@@ -32,6 +32,18 @@
#clock-cells = <0>;
clock-frequency = <26000000>;
};
+
+ clk_25_0: clock4 { /* u92/u91 - GEM2 */
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <25000000>;
+ };
+
+ clk_25_1: clock5 { /* u92/u91 - GEM3 */
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <25000000>;
+ };
};
&can0 {
Applied.
M
