On Mar 6, 2011, at 10:14 PM, Kumar Gala wrote: > From: Priyanka Jain <priyanka.j...@freescale.com> > > P1010 and P1014 has v2.3 version of FSL eSDHC controller in which watermark > level register description has been changed: > > 9-15 bits represent WR_WML[0:6], Max value = 128 represented by 0x00 > 25-31 bits represent RD_WML[0:6], Max value = 128 represented by 0x00 > > Signed-off-by: Priyanka Jain <priyanka.j...@freescale.com> > Signed-off-by: Poonam Aggrwal <poonam.aggr...@freescale.com> > Signed-off-by: Kumar Gala <ga...@kernel.crashing.org> > --- > arch/powerpc/include/asm/config_mpc85xx.h | 2 ++ > drivers/mmc/fsl_esdhc.c | 8 ++++---- > include/fsl_esdhc.h | 15 ++++++++++++++- > 3 files changed, 20 insertions(+), 5 deletions(-)
Stefano, Can you test on i.MX to make sure we didn't break anything. > > diff --git a/arch/powerpc/include/asm/config_mpc85xx.h > b/arch/powerpc/include/asm/config_mpc85xx.h > index 0b5f78a..1f4dee4 100644 > --- a/arch/powerpc/include/asm/config_mpc85xx.h > +++ b/arch/powerpc/include/asm/config_mpc85xx.h > @@ -88,6 +88,7 @@ > > #elif defined(CONFIG_P1010) > #define CONFIG_MAX_CPUS 1 > +#define CONFIG_FSL_SDHC_V2_3 > #define CONFIG_SYS_FSL_NUM_LAWS 12 > #define CONFIG_TSECV2 > #define CONFIG_SYS_FSL_SEC_COMPAT 4 > @@ -131,6 +132,7 @@ > > #elif defined(CONFIG_P1014) > #define CONFIG_MAX_CPUS 1 > +#define CONFIG_FSL_SDHC_V2_3 > #define CONFIG_SYS_FSL_NUM_LAWS 12 > #define CONFIG_TSECV2 > #define CONFIG_SYS_FSL_SEC_COMPAT 4 > diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c > index 0962ac4..4f1b515 100644 > --- a/drivers/mmc/fsl_esdhc.c > +++ b/drivers/mmc/fsl_esdhc.c > @@ -178,14 +178,14 @@ static int esdhc_setup_data(struct mmc *mmc, struct > mmc_data *data) > wml_value = data->blocksize/4; > > if (data->flags & MMC_DATA_READ) { > - if (wml_value > 0x10) > - wml_value = 0x10; > + if (wml_value > WML_RD_WML_MAX) > + wml_value = WML_RD_WML_MAX_VAL; > > esdhc_clrsetbits32(®s->wml, WML_RD_WML_MASK, wml_value); > esdhc_write32(®s->dsaddr, (u32)data->dest); > } else { > - if (wml_value > 0x80) > - wml_value = 0x80; > + if (wml_value > WML_WR_WML_MAX) > + wml_value = WML_WR_WML_MAX_VAL; > if ((esdhc_read32(®s->prsstat) & PRSSTAT_WPSPL) == 0) { > printf("\nThe SD card is locked. Can not write to a > locked card.\n\n"); > return TIMEOUT; > diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h > index 477bbd7..8418bf7 100644 > --- a/include/fsl_esdhc.h > +++ b/include/fsl_esdhc.h > @@ -2,7 +2,7 @@ > * FSL SD/MMC Defines > *------------------------------------------------------------------- > * > - * Copyright 2007-2008,2010 Freescale Semiconductor, Inc > + * Copyright 2007-2008,2010-2011 Freescale Semiconductor, Inc > * > * This program is free software; you can redistribute it and/or > * modify it under the terms of the GNU General Public License as > @@ -135,8 +135,21 @@ > > #define WML 0x2e044 > #define WML_WRITE 0x00010000 > +#ifdef CONFIG_FSL_SDHC_V2_3 > +#define WML_RD_WML_MAX 0x80 > +#define WML_WR_WML_MAX 0x80 > +#define WML_RD_WML_MAX_VAL 0x0 > +#define WML_WR_WML_MAX_VAL 0x0 > +#define WML_RD_WML_MASK 0x7f > +#define WML_WR_WML_MASK 0x7f0000 > +#else > +#define WML_RD_WML_MAX 0x10 > +#define WML_WR_WML_MAX 0x80 > +#define WML_RD_WML_MAX_VAL 0x10 > +#define WML_WR_WML_MAX_VAL 0x80 > #define WML_RD_WML_MASK 0xff > #define WML_WR_WML_MASK 0xff0000 > +#endif > > #define BLKATTR 0x2e004 > #define BLKATTR_CNT(x) ((x & 0xffff) << 16) > -- > 1.7.2.3 > > _______________________________________________ > U-Boot mailing list > U-Boot@lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot