Hi, > -----Original Message----- > From: Lim, Jit Loon <jit.loon....@intel.com> > Sent: Tuesday, February 20, 2024 10:36 PM > To: u-boot@lists.denx.de > Cc: Jagan Teki <ja...@amarulasolutions.com>; Marek <ma...@denx.de>; > Simon <simon.k.r.goldschm...@gmail.com>; Chee, Tien Fong > <tien.fong.c...@intel.com>; Hea, Kok Kiang <kok.kiang....@intel.com>; > Maniyam, Dinesh <dinesh.mani...@intel.com>; Ng, Boon Khai > <boon.khai...@intel.com>; Yuslaimi, Alif Zakuan > <alif.zakuan.yusla...@intel.com>; Chong, Teik Heng > <teik.heng.ch...@intel.com>; Zamri, Muhammad Hazim Izzat > <muhammad.hazim.izzat.za...@intel.com>; Lim, Jit Loon > <jit.loon....@intel.com>; Tang, Sieu Mun <sieu.mun.t...@intel.com>; Bin > Meng <bmeng...@gmail.com> > Subject: [PATCH v1 1/1] arch:arm: Agilex5 enablement > > This patch is to enable Agilex5 platform for Intel product. Changes, > modification and new files are created for board, dts, configs and makefile to > create the base for Agilex5. > > Signed-off-by: Jit Loon Lim <jit.loon....@intel.com> > --- > arch/arm/Kconfig | 9 +- > arch/arm/dts/Makefile | 32 +---- > .../arm/dts/socfpga_agilex5_socdk-u-boot.dtsi | 11 +- > arch/arm/dts/socfpga_agilex5_socdk.dts | 67 +--------- > arch/arm/dts/socfpga_soc64_fit-u-boot.dtsi | 2 +- > arch/arm/mach-socfpga/Kconfig | 125 +++++------------- > arch/arm/mach-socfpga/Makefile | 99 +------------- > arch/arm/mach-socfpga/board.c | 2 - > .../include/mach/base_addr_soc64.h | 16 +-- > board/intel/agilex5-socdk/MAINTAINERS | 2 + > board/intel/agilex5-socdk/Makefile | 2 +- > board/intel/agilex5-socdk/socfpga.c | 2 +- > configs/socfpga_agilex5_defconfig | 33 ----- > include/configs/socfpga_agilex5_socdk.h | 2 +- > include/configs/socfpga_soc64_common.h | 40 +----- > 15 files changed, 63 insertions(+), 381 deletions(-) > > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index > 43d5ad346f..c8d91669da 100644 > --- a/arch/arm/Kconfig > +++ b/arch/arm/Kconfig > @@ -28,7 +28,7 @@ config COUNTER_FREQUENCY > ROCKCHIP_RK3288 || ROCKCHIP_RK322X || > ROCKCHIP_RK3036 > default 25000000 if ARCH_LX2160A || ARCH_LX2162A || > ARCH_LS1088A > default 100000000 if ARCH_ZYNQMP > - default 400000000 if ARCH_SOCFPGA && ARM64
This patch is not based on latest U-Boot main branch https://source.denx.de/u-boot/u-boot.git, no such code in current main branch. > + default 200000000 if ARCH_SOCFPGA && ARM64 && > TARGET_SOCFPGA_AGILEX5 > default 0 > help > For platforms with ARMv8-A and ARMv7-A which features a system > @@ -1088,14 +1088,14 @@ config ARCH_SNAPDRAGON > select SPMI > imply CMD_DM > > -config ARCH_SOCFPGA Why remove this? > - bool "Altera SOCFPGA family" > +bool "Altera SOCFPGA family" Why to change this? > select ARCH_EARLY_INIT_R > select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10 > select ARM64 if TARGET_SOCFPGA_SOC64 > select CPU_V7A if TARGET_SOCFPGA_GEN5 || > TARGET_SOCFPGA_ARRIA10 > select DM > select DM_SERIAL > + select GICV2 > select GPIO_EXTRA_HEADER > select ENABLE_ARM_SOC_BOOT0_HOOK if > TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 > select OF_CONTROL > @@ -1109,7 +1109,7 @@ config ARCH_SOCFPGA > select SPL_SOCFPGA_SEC_REG if TARGET_SOCFPGA_SOC64 > select SPL_SERIAL > select SPL_SYSRESET > - select SPL_WATCHDOG > + select SPL_WATCHDOG if !TARGET_SOCFPGA_AGILEX5 This can be removed, watchdog is supported in Agilex5 > select SUPPORT_SPL > select SYS_NS16550 > select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || > TARGET_SOCFPGA_ARRIA10 @@ -1123,6 +1123,7 @@ config > ARCH_SOCFPGA > imply DM_SPI > imply DM_SPI_FLASH > imply FAT_WRITE > + imply MTD > imply SPL > imply SPL_DM > imply SPL_DM_SPI > diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index > 90d933a9ae..646f4feaf7 100644 > --- a/arch/arm/dts/Makefile > +++ b/arch/arm/dts/Makefile > @@ -543,37 +543,7 @@ dtb-$(CONFIG_TARGET_AM3517_EVM) += am3517- > evm.dtb > dtb-$(CONFIG_TARGET_THUNDERX_88XX) += thunderx-88xx.dtb > > dtb-$(CONFIG_ARCH_SOCFPGA) += \ > - socfpga_agilex_n6010.dtb \ > - socfpga_agilex_socdk.dtb \ > - socfpga_agilex_socdk_nand.dtb \ > - socfpga_agilex_socdk_qspi.dtb \ > - socfpga_agilex5_socdk.dtb \ > - socfpga_agilex5_emu.dtb \ > - socfpga_agilex7m_socdk.dtb \ > - socfpga_agilex7m_socdk_nand.dtb \ > - socfpga_arria5_secu1.dtb \ > - socfpga_arria5_socdk.dtb \ > - socfpga_arria10_chameleonv3_270_2.dtb \ > - socfpga_arria10_chameleonv3_270_3.dtb \ > - socfpga_arria10_chameleonv3_480_2.dtb \ > - socfpga_arria10_socdk_nand.dtb \ > - socfpga_arria10_socdk_qspi.dtb \ > - socfpga_arria10_socdk_sdmmc.dtb \ > - socfpga_cyclone5_mcvevk.dtb \ > - socfpga_cyclone5_is1.dtb \ > - socfpga_cyclone5_socdk.dtb \ > - socfpga_cyclone5_dbm_soc1.dtb \ > - socfpga_cyclone5_de0_nano_soc.dtb \ > - socfpga_cyclone5_de1_soc.dtb \ > - socfpga_cyclone5_de10_nano.dtb \ > - socfpga_cyclone5_sockit.dtb \ > - socfpga_cyclone5_socrates.dtb \ > - socfpga_cyclone5_sr1500.dtb \ > - socfpga_cyclone5_vining_fpga.dtb \ > - socfpga_n5x_socdk.dtb \ > - socfpga_stratix10_socdk.dtb \ > - socfpga_stratix10_socdk_nand.dtb \ > - socfpga_stratix10_socdk_qspi.dtb Why remove these? > + socfpga_agilex5_socdk.dtb > > dtb-$(CONFIG_TARGET_DRA7XX_EVM) += dra72-evm.dtb dra7-evm.dtb > \ > dra72-evm-revc.dtb dra71-evm.dtb dra76-evm.dtb diff --git > a/arch/arm/dts/socfpga_agilex5_socdk-u-boot.dtsi > b/arch/arm/dts/socfpga_agilex5_socdk-u-boot.dtsi > index 5da93576c2..28e1c140c2 100755 > --- a/arch/arm/dts/socfpga_agilex5_socdk-u-boot.dtsi > +++ b/arch/arm/dts/socfpga_agilex5_socdk-u-boot.dtsi > @@ -2,7 +2,7 @@ > /* > * U-Boot additions > * > - * Copyright (C) 2022-2023 Intel Corporation <www.intel.com> > + * Copyright (C) 2024 Intel Corporation <www.intel.com> > */ You are not using U-Boot main branch as the base. Please rebase the patch on U-Boot main branch, I will review in next version. [...] Regards, Tien Fong
