On Thu, 28 Dec 2023 00:28:43 +0300
Andrey Skvortsov <andrej.skvort...@gmail.com> wrote:
> Current sunxi DRAM initialisation code does several test accesses to the
> DRAM array to detect aliasing effects and so determine the correct
> row/column configuration. This changes the DRAM content, which breaks
> use cases like soft reset and Linux's ramoops mechanism.
>
> Fix this problem by saving and restoring the content of the DRAM cells
> that is used for the test writes.
>
> Signed-off-by: Andrey Skvortsov <andrej.skvort...@gmail.com>
Reviewed-by: Andre Przywara <andre.przyw...@arm.com>
Merged to sunxi/master.
Cheers,
Andre
> ---
> arch/arm/mach-sunxi/dram_helpers.c | 16 ++++++++++++++--
> 1 file changed, 14 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/mach-sunxi/dram_helpers.c
> b/arch/arm/mach-sunxi/dram_helpers.c
> index 661186b648..e487f87bf3 100644
> --- a/arch/arm/mach-sunxi/dram_helpers.c
> +++ b/arch/arm/mach-sunxi/dram_helpers.c
> @@ -32,13 +32,25 @@ void mctl_await_completion(u32 *reg, u32 mask, u32 val)
> #ifndef CONFIG_MACH_SUNIV
> bool mctl_mem_matches_base(u32 offset, ulong base)
> {
> + u32 val_base;
> + u32 val_offset;
> + bool ret;
> +
> + /* Save original values */
> + val_base = readl(base);
> + val_offset = readl(base + offset);
> +
> /* Try to write different values to RAM at two addresses */
> writel(0, base);
> writel(0xaa55aa55, base + offset);
> dsb();
> /* Check if the same value is actually observed when reading back */
> - return readl(base) ==
> - readl(base + offset);
> + ret = readl(base) == readl(base + offset);
> +
> + /* Restore original values */
> + writel(val_base, base);
> + writel(val_offset, base + offset);
> + return ret;
> }
>
> /*
