From: Ashok Reddy Soma <[email protected]> Enable mt35xu512aba_fixups for all mt35 series flashes to work in DTR mode, and return after nor->fixups is updated, otherwise it will get overwritten with macronix_octal_fixups. This flash works in DTR mode only if CONFIG_SPI_FLASH_MT35XU is enabled and SPI_NOR_OCTAL_DTR_READ flag is set in id table.
Additionally, a new flag, "SPI_XFER_SET_DDR," has been introduced to instruct the Ospi controller driver to switch to DDR mode. Signed-off-by: Ashok Reddy Soma <[email protected]> Co-developed-by: Tejas Bhumkar <[email protected]> Signed-off-by: Tejas Bhumkar <[email protected]> --- drivers/mtd/spi/spi-nor-core.c | 8 +++++++- drivers/spi/cadence_qspi.c | 2 +- include/spi.h | 1 + 3 files changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index 5895b5de09..e8640cbf07 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -3975,6 +3975,7 @@ static int spi_nor_micron_octal_dtr_enable(struct spi_nor *nor) if (ret) return ret; + nor->spi->flags |= SPI_XFER_SET_DDR; *buf = SPINOR_MT_OCT_DTR; op = (struct spi_mem_op) SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_MT_WR_ANY_REG, 1), @@ -4302,8 +4303,13 @@ void spi_nor_set_fixups(struct spi_nor *nor) #endif #ifdef CONFIG_SPI_FLASH_MT35XU - if (!strcmp(nor->info->name, "mt35xu512aba")) + if (!strcmp(nor->info->name, "mt35xu512aba") || + !strcmp(nor->info->name, "mt35xl512aba") || + !strcmp(nor->info->name, "mt35xu01g") || + !strcmp(nor->info->name, "mt35xu02g")) { nor->fixups = &mt35xu512aba_fixups; + return; + } #endif #if CONFIG_IS_ENABLED(SPI_FLASH_MACRONIX) diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c index dd6aef9ab5..d312bafd90 100644 --- a/drivers/spi/cadence_qspi.c +++ b/drivers/spi/cadence_qspi.c @@ -702,7 +702,7 @@ static int cadence_spi_mem_exec_op(struct spi_slave *spi, break; } - if (op->cmd.dtr) + if ((spi->flags & SPI_XFER_SET_DDR) && op->cmd.dtr) err = cadence_spi_setup_ddrmode(spi, op); return err; diff --git a/include/spi.h b/include/spi.h index ab51c8428b..ade30fab73 100644 --- a/include/spi.h +++ b/include/spi.h @@ -172,6 +172,7 @@ struct spi_slave { #define SPI_XFER_ONCE (SPI_XFER_BEGIN | SPI_XFER_END) #define SPI_XFER_U_PAGE BIT(4) #define SPI_XFER_STACKED BIT(5) +#define SPI_XFER_SET_DDR BIT(6) /* * Flag indicating that the spi-controller has multi chip select * capability and can assert/de-assert more than one chip select -- 2.27.0
