From: Wan Yee Lau <wan.yee....@intel.com>
Add platform related files for new platform Agilex7 M-series.
Signed-off-by: Wan Yee Lau <wan.yee....@intel.com>
Signed-off-by: Teik Heng Chong <teik.heng.ch...@intel.com>
Signed-off-by: Tingting Meng <tingting.m...@intel.com>
---
arch/arm/mach-socfpga/include/mach/misc.h | 3 +-
.../{spl_agilex.c => spl_agilex7m.c} | 45 ++++++++++++-------
arch/arm/mach-socfpga/wrap_handoff_soc64.c | 4 ++
board/intel/agilex7m-socdk/MAINTAINERS | 7 +++
board/intel/agilex7m-socdk/socfpga.c | 4 ++
5 files changed, 45 insertions(+), 18 deletions(-)
copy arch/arm/mach-socfpga/{spl_agilex.c => spl_agilex7m.c} (68%)
create mode 100644 board/intel/agilex7m-socdk/MAINTAINERS
create mode 100644 board/intel/agilex7m-socdk/socfpga.c
diff --git a/arch/arm/mach-socfpga/include/mach/misc.h
b/arch/arm/mach-socfpga/include/mach/misc.h
index 8460acb00d..e271d2855f 100644
--- a/arch/arm/mach-socfpga/include/mach/misc.h
+++ b/arch/arm/mach-socfpga/include/mach/misc.h
@@ -40,7 +40,8 @@ void socfpga_sdram_remap_zero(void);
#endif
#if defined(CONFIG_TARGET_SOCFPGA_STRATIX10) || \
- defined(CONFIG_TARGET_SOCFPGA_AGILEX)
+ defined(CONFIG_TARGET_SOCFPGA_AGILEX) || \
+ defined(CONFIG_TARGET_SOCFPGA_AGILEX7M)
int is_fpga_config_ready(void);
#endif
diff --git a/arch/arm/mach-socfpga/spl_agilex.c
b/arch/arm/mach-socfpga/spl_agilex7m.c
similarity index 68%
copy from arch/arm/mach-socfpga/spl_agilex.c
copy to arch/arm/mach-socfpga/spl_agilex7m.c
index ee5a9dc1e2..ee41db8884 100644
--- a/arch/arm/mach-socfpga/spl_agilex.c
+++ b/arch/arm/mach-socfpga/spl_agilex7m.c
@@ -1,26 +1,25 @@
// SPDX-License-Identifier: GPL-2.0
/*
- * Copyright (C) 2019 Intel Corporation <www.intel.com>
- *
+ * Copyright (C) 2024 Intel Corporation <www.intel.com>
*/
-#include <init.h>
-#include <log.h>
-#include <asm/global_data.h>
-#include <asm/io.h>
-#include <asm/u-boot.h>
-#include <asm/utils.h>
#include <common.h>
#include <hang.h>
#include <image.h>
+#include <init.h>
+#include <log.h>
#include <spl.h>
+#include <wdt.h>
#include <asm/arch/clock_manager.h>
#include <asm/arch/firewall.h>
#include <asm/arch/mailbox_s10.h>
#include <asm/arch/misc.h>
#include <asm/arch/reset_manager.h>
#include <asm/arch/system_manager.h>
-#include <watchdog.h>
+#include <asm/global_data.h>
+#include <asm/io.h>
+#include <asm/u-boot.h>
+#include <asm/utils.h>
#include <dm/uclass.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -40,13 +39,6 @@ void board_init_f(ulong dummy)
writel(SYSMGR_WDDBG_PAUSE_ALL_CPU,
socfpga_get_sysmgr_addr() + SYSMGR_SOC64_WDDBG);
-#ifdef CONFIG_HW_WATCHDOG
- /* Enable watchdog before initializing the HW */
- socfpga_per_reset(SOCFPGA_RESET(L4WD0), 1);
- socfpga_per_reset(SOCFPGA_RESET(L4WD0), 0);
- hw_watchdog_init();
-#endif
-
/* ensure all processors are not released prior Linux boot */
writeq(0, CPU_RELEASE_ADDR);
@@ -60,11 +52,30 @@ void board_init_f(ulong dummy)
hang();
}
+ /*
+ * Enable watchdog as early as possible before initializing other
+ * component. Watchdog need to be enabled after clock driver because
+ * it will retrieve the clock frequency from clock driver.
+ */
+ if (CONFIG_IS_ENABLED(WDT))
+ initr_watchdog();
+
preloader_console_init();
print_reset_info();
cm_print_clock_quick_summary();
- firewall_setup();
+ ret = uclass_get_device_by_name(UCLASS_NOP,
"socfpga-system-mgr-firewall", &dev);
+ if (ret) {
+ printf("System manager firewall configuration failed: %d\n",
ret);
+ hang();
+ }
+
+ ret = uclass_get_device_by_name(UCLASS_NOP,
"socfpga-l3interconnect-firewall", &dev);
+ if (ret) {
+ printf("L3 interconnect firewall configuration failed: %d\n",
ret);
+ hang();
+ }
+
ret = uclass_get_device(UCLASS_CACHE, 0, &dev);
if (ret) {
debug("CCU init failed: %d\n", ret);
diff --git a/arch/arm/mach-socfpga/wrap_handoff_soc64.c
b/arch/arm/mach-socfpga/wrap_handoff_soc64.c
index 6aa9bb26b4..8c06b3d59e 100644
--- a/arch/arm/mach-socfpga/wrap_handoff_soc64.c
+++ b/arch/arm/mach-socfpga/wrap_handoff_soc64.c
@@ -39,6 +39,10 @@ static enum endianness check_endianness(u32 handoff)
case SOC64_HANDOFF_DDR_PHY_INIT_ENGINE_MAGIC:
debug("%s: PHY engine handoff data\n", __func__);
return LITTLE_ENDIAN;
+#elif IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX7M)
+ case SOC64_HANDOFF_MAGIC_DDR:
+ debug("%s: SOC64_HANDOFF_MAGIC_DDR\n", __func__);
+ return BIG_ENDIAN;
#endif
default:
debug("%s: Unknown endianness!!\n", __func__);
diff --git a/board/intel/agilex7m-socdk/MAINTAINERS
b/board/intel/agilex7m-socdk/MAINTAINERS
new file mode 100644
index 0000000000..feb2916488
--- /dev/null
+++ b/board/intel/agilex7m-socdk/MAINTAINERS
@@ -0,0 +1,7 @@
+SOCFPGA BOARD
+M: Tien Fong Chee <tien.fong.c...@intel.com>
+M: Teik Heng Chong <teik.heng.ch...@intel.com>
+S: Maintained
+F: board/intel/agilex7m-socdk/
+F: include/configs/socfpga_agilex7m_socdk.h
+F: configs/socfpga_agilex7m_sdmmc_defconfig
diff --git a/board/intel/agilex7m-socdk/socfpga.c
b/board/intel/agilex7m-socdk/socfpga.c
new file mode 100644
index 0000000000..52921d90aa
--- /dev/null
+++ b/board/intel/agilex7m-socdk/socfpga.c
@@ -0,0 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2024 Intel Corporation <www.intel.com>
+ */
--
2.25.1
