Hi Jonas,
On 8/3/24 12:56 AM, Jonas Karlman wrote:
Add gpio-ranges props to supported SoCs based on the following Linux
patches:
ARM: dts: rockchip: add gpio-ranges property to gpio nodes
https://lore.kernel.org/all/[email protected]/
arm64: dts: rockchip: add gpio-ranges property to gpio nodes
https://lore.kernel.org/all/[email protected]/
For RK3066 and RK3288 the gpio-ranges props is adjusted to match
https://lore.kernel.org/all/[email protected]/
Re-enable gpio6 on RK3066 now that the pinctrl pin offset is used with
get_gpio_mux().
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
---
v2: Collect r-b tag
Cc: Johan Jonker <[email protected]>
---
arch/arm/dts/rk3036-u-boot.dtsi | 12 ++++++++++++
arch/arm/dts/rk3066a-u-boot.dtsi | 3 +--
arch/arm/dts/rk3128-u-boot.dtsi | 16 ++++++++++++++++
arch/arm/dts/rk322x-u-boot.dtsi | 16 ++++++++++++++++
arch/arm/dts/rk3288-u-boot.dtsi | 33 ++++++++++++++++++++++++++++++++
arch/arm/dts/rk3308-u-boot.dtsi | 20 +++++++++++++++++++
arch/arm/dts/rk3328-u-boot.dtsi | 13 +++++++++++++
arch/arm/dts/rk3368-u-boot.dtsi | 16 ++++++++++++++++
arch/arm/dts/rk3399-u-boot.dtsi | 20 +++++++++++++++++++
arch/arm/dts/rv1108-u-boot.dtsi | 16 ++++++++++++++++
arch/arm/dts/rv1126-u-boot.dtsi | 14 ++++++++++++++
11 files changed, 177 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/rk3036-u-boot.dtsi b/arch/arm/dts/rk3036-u-boot.dtsi
index 41ac054b81e8..3e788187f630 100644
--- a/arch/arm/dts/rk3036-u-boot.dtsi
+++ b/arch/arm/dts/rk3036-u-boot.dtsi
@@ -4,3 +4,15 @@
*/
#include "rockchip-u-boot.dtsi"
+
+&gpio0 {
+ gpio-ranges = <&pinctrl 0 0 32>;
+};
+
+&gpio1 {
+ gpio-ranges = <&pinctrl 0 32 32>;
+};
+
+&gpio2 {
+ gpio-ranges = <&pinctrl 0 64 32>;
+};
diff --git a/arch/arm/dts/rk3066a-u-boot.dtsi b/arch/arm/dts/rk3066a-u-boot.dtsi
index 06f405ca2c5e..35b52d6fb7f3 100644
--- a/arch/arm/dts/rk3066a-u-boot.dtsi
+++ b/arch/arm/dts/rk3066a-u-boot.dtsi
@@ -24,6 +24,5 @@
};
&gpio6 {
- status = "disabled";
+ gpio-ranges = <&pinctrl 0 160 16>;
};
-
diff --git a/arch/arm/dts/rk3128-u-boot.dtsi b/arch/arm/dts/rk3128-u-boot.dtsi
index 6d1965e6b520..dd1208e7cf40 100644
--- a/arch/arm/dts/rk3128-u-boot.dtsi
+++ b/arch/arm/dts/rk3128-u-boot.dtsi
@@ -14,6 +14,22 @@
bootph-all;
};
+&gpio0 {
+ gpio-ranges = <&pinctrl 0 0 32>;
+};
+
+&gpio1 {
+ gpio-ranges = <&pinctrl 0 32 32>;
+};
+
+&gpio2 {
+ gpio-ranges = <&pinctrl 0 64 32>;
+};
+
+&gpio3 {
+ gpio-ranges = <&pinctrl 0 96 32>;
+};
+
&grf {
bootph-all;
};
diff --git a/arch/arm/dts/rk322x-u-boot.dtsi b/arch/arm/dts/rk322x-u-boot.dtsi
index aea917544b1c..f0e2a1f95aa0 100644
--- a/arch/arm/dts/rk322x-u-boot.dtsi
+++ b/arch/arm/dts/rk322x-u-boot.dtsi
@@ -47,6 +47,22 @@
max-frequency = <150000000>;
};
+&gpio0 {
+ gpio-ranges = <&pinctrl 0 0 32>;
+};
+
+&gpio1 {
+ gpio-ranges = <&pinctrl 0 32 32>;
+};
+
+&gpio2 {
+ gpio-ranges = <&pinctrl 0 64 32>;
+};
+
+&gpio3 {
+ gpio-ranges = <&pinctrl 0 96 32>;
+};
+
&grf {
bootph-all;
};
diff --git a/arch/arm/dts/rk3288-u-boot.dtsi b/arch/arm/dts/rk3288-u-boot.dtsi
index a43d320ade7b..0f8053a8b690 100644
--- a/arch/arm/dts/rk3288-u-boot.dtsi
+++ b/arch/arm/dts/rk3288-u-boot.dtsi
@@ -95,8 +95,41 @@
clock-names = "clk_edp", "clk_edp_24m", "pclk_edp";
};
+&gpio0 {
+ gpio-ranges = <&pinctrl 0 0 24>;
+};
+
+&gpio1 {
+ gpio-ranges = <&pinctrl 0 24 32>;
+};
+
+&gpio2 {
+ gpio-ranges = <&pinctrl 0 56 32>;
+};
+
+&gpio3 {
+ gpio-ranges = <&pinctrl 0 88 32>;
+};
+
+&gpio4 {
+ gpio-ranges = <&pinctrl 0 120 32>;
+};
+
+&gpio5 {
+ gpio-ranges = <&pinctrl 0 152 32>;
+};
+
+&gpio6 {
+ gpio-ranges = <&pinctrl 0 184 32>;
+};
+
&gpio7 {
bootph-all;
+ gpio-ranges = <&pinctrl 0 216 32>;
+};
+
+&gpio8 {
+ gpio-ranges = <&pinctrl 0 248 16>;
};
&grf {
diff --git a/arch/arm/dts/rk3308-u-boot.dtsi b/arch/arm/dts/rk3308-u-boot.dtsi
index b7964e2756f3..c2d56b532f80 100644
--- a/arch/arm/dts/rk3308-u-boot.dtsi
+++ b/arch/arm/dts/rk3308-u-boot.dtsi
@@ -54,6 +54,26 @@
bootph-some-ram;
};
+&gpio0 {
+ gpio-ranges = <&pinctrl 0 0 32>;
+};
+
+&gpio1 {
+ gpio-ranges = <&pinctrl 0 32 32>;
+};
+
+&gpio2 {
+ gpio-ranges = <&pinctrl 0 64 32>;
+};
+
+&gpio3 {
+ gpio-ranges = <&pinctrl 0 96 32>;
+};
+
+&gpio4 {
+ gpio-ranges = <&pinctrl 0 128 32>;
+};
+
&grf {
bootph-all;
};
diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi
index 0135bc08d491..3bc776146a82 100644
--- a/arch/arm/dts/rk3328-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-u-boot.dtsi
@@ -57,6 +57,19 @@
&gpio0 {
bootph-pre-ram;
+ gpio-ranges = <&pinctrl 0 0 32>;
+};
+
+&gpio1 {
+ gpio-ranges = <&pinctrl 0 32 32>;
+};
+
+&gpio2 {
+ gpio-ranges = <&pinctrl 0 64 32>;
+};
+
+&gpio3 {
+ gpio-ranges = <&pinctrl 0 96 32>;
};
&grf {
diff --git a/arch/arm/dts/rk3368-u-boot.dtsi b/arch/arm/dts/rk3368-u-boot.dtsi
index 811d59ac346e..be2ebda83529 100644
--- a/arch/arm/dts/rk3368-u-boot.dtsi
+++ b/arch/arm/dts/rk3368-u-boot.dtsi
@@ -26,3 +26,19 @@
reg = <0x0 0xff740000 0x0 0x1000>;
};
};
+
+&gpio0 {
+ gpio-ranges = <&pinctrl 0 0 32>;
+};
+
+&gpio1 {
+ gpio-ranges = <&pinctrl 0 32 32>;
+};
+
+&gpio2 {
+ gpio-ranges = <&pinctrl 0 64 32>;
+};
+
+&gpio3 {
+ gpio-ranges = <&pinctrl 0 96 32>;
+};
diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi
index c4c8bb1401ea..cead23ea7c20 100644
--- a/arch/arm/dts/rk3399-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-u-boot.dtsi
@@ -91,6 +91,26 @@
bootph-some-ram;
};
+&gpio0 {
+ gpio-ranges = <&pinctrl 0 0 32>;
Only 15 available here... /me sobs
TRM part 1:
GPIO0_A[7:0]
GPIO0_B[6:0]
no GPIO0_C or D it seems (though the TRM somehow mentions GPIO0_C but
nothing to configure it and the Linux kernel driver says bank0 is 16
pins (which is also incorrect as there's no GPIO0_B7)...
+};
+
+&gpio1 {
+ gpio-ranges = <&pinctrl 0 32 32>;
This also is incorrect, GPIO1_D only has one pin.
+};
+
+&gpio2 {
+ gpio-ranges = <&pinctrl 0 64 32>;
This also is incorrect...
GPIO2_B stops at pin4, no 5,6,7.
Same for GPIO2_D.
+};
+
+&gpio3 {
+ gpio-ranges = <&pinctrl 0 96 32>;
This also is incorrect..........
GPIO3_C stops at pin1.
GPIO3_D stops at pin
+};
+
+&gpio4 {
+ gpio-ranges = <&pinctrl 0 128 32>;
This also is incorrect.................. (the number of dots matches the
number of tears rolling down my face).
GPIO4_B stops at pin5.
GPIO4_D stops at pin1.
I only checked for the SoC I personally care (RK3399).
Quentin
