[PATCH v2] gpio: mxc_gpio: fix reading state of GPIO pins in output mode

[Tomas Paukrt]

The PSR register works correctly for GPIO pins in input mode,
but always returns 0 for GPIO pins in output mode unless the SION
bit is set. The DR register works correctly in both modes without
the need to set the SION bit.

Please note that the Linux gpio-mxc driver already uses
the DR register for all GPIO pins in output mode:

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=442b2494b17d1a4f0a14721580271eb23ebffd42

Signed-off-by: Tomas Paukrt <tomaspau...@email.cz>
---
 drivers/gpio/mxc_gpio.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpio/mxc_gpio.c b/drivers/gpio/mxc_gpio.c
index cac6b32..5cd7681 100644
--- a/drivers/gpio/mxc_gpio.c
+++ b/drivers/gpio/mxc_gpio.c
@@ -133,7 +133,7 @@ int gpio_get_value(unsigned gpio)

        regs = (struct gpio_regs *)gpio_ports[port];

-       val = (readl(&regs->gpio_psr) >> gpio) & 0x01;
+       val = (readl(&regs->gpio_dr) >> gpio) & 0x01;

        return val;
 }
@@ -210,7 +210,7 @@ static void mxc_gpio_bank_set_value(struct gpio_regs *regs, 
int offset,

 static int mxc_gpio_bank_get_value(struct gpio_regs *regs, int offset)
 {
-       return (readl(&regs->gpio_psr) >> offset) & 0x01;
+       return (readl(&regs->gpio_dr) >> offset) & 0x01;
 }

 /* set GPIO pin 'gpio' as an input */
--
2.7.4