Dear Kumar Gala, In message <2cf0740e-8067-456c-b3aa-1d8ce3a76...@kernel.crashing.org> you wrote: > > > This loop is similar to what nand_spl/nand_boot.c is using. It's ugly, but > > the goal here is small code rather than cleanliness. Is the timebase > > running at this point? How much code is required to get the timebase > > frequency? > > TB isn't running so you have to turn it on in the SoC (so a few CCSRBAR > read/writes), than you have to calculate freq on some boards its a #define > constant, on other its calculated reading I2C which would add a bunch of code > for accessing I2C. I'm pret > ty sure we aren't going to be able to do that in 4k.
No matter what exactly you do, the loop we have now cannot be used as it is completley dependent on the tool chain if there is any delay at all, and it's pretty much nondeterministic how long it will be using different tool chains. This code is simply broken and needs fixing. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de The human mind ordinarily operates at only ten percent of its capaci- ty - the rest is overhead for the operating system. _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
