On Sun, Oct 27, 2024 at 6:59 PM Hal Feng <[email protected]> wrote: > > To support the other JH7110 based boards, add u-boot > device tree for them. > > Cc: Heinrich Schuchardt <[email protected]> > Cc: H Bell <[email protected]> > Signed-off-by: Hal Feng <[email protected]> > --- > arch/riscv/dts/jh7110-milkv-mars-u-boot.dtsi | 11 +++++++++++ > arch/riscv/dts/jh7110-pine64-star64-u-boot.dtsi | 6 ++++++ > .../jh7110-starfive-visionfive-2-v1.2a-u-boot.dtsi | 6 ++++++ > 3 files changed, 23 insertions(+) > create mode 100644 arch/riscv/dts/jh7110-milkv-mars-u-boot.dtsi > create mode 100644 arch/riscv/dts/jh7110-pine64-star64-u-boot.dtsi > create mode 100644 > arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a-u-boot.dtsi > > diff --git a/arch/riscv/dts/jh7110-milkv-mars-u-boot.dtsi > b/arch/riscv/dts/jh7110-milkv-mars-u-boot.dtsi > new file mode 100644 > index 0000000000..2ad4068549 > --- /dev/null > +++ b/arch/riscv/dts/jh7110-milkv-mars-u-boot.dtsi > @@ -0,0 +1,11 @@ > +// SPDX-License-Identifier: GPL-2.0 OR MIT > +/* > + * Copyright (C) 2024 StarFive Technology Co., Ltd. > + */ > + > +#include "jh7110-common-u-boot.dtsi" > + > +&phy0 { > + /delete-property/ motorcomm,tx-clk-10-inverted; > + rx-internal-delay-ps = <1900>; > +};
For Heinrich, what is the origin of rx-internal-delay-ps 1900 value? Refer to: https://patchwork.ozlabs.org/project/uboot/list/?series=429908 " riscv64: dts: starfive: Mars ethernet0 phy delay values sync with upstream Linux " For Hal, I think we should not replace the rx-internal-delay-ps property here and then the phy delay patch for Mars (as mentioned) is not needed. Carrying this value from before OF_UPSTREAM creates work for future, unless you prefer to avoid change in functionality compared to before OF_UPSTREAM. > diff --git a/arch/riscv/dts/jh7110-pine64-star64-u-boot.dtsi > b/arch/riscv/dts/jh7110-pine64-star64-u-boot.dtsi > new file mode 100644 > index 0000000000..9df1e5db55 > --- /dev/null > +++ b/arch/riscv/dts/jh7110-pine64-star64-u-boot.dtsi > @@ -0,0 +1,6 @@ > +// SPDX-License-Identifier: GPL-2.0 OR MIT > +/* > + * Copyright (C) 2024 StarFive Technology Co., Ltd. > + */ > + > +#include "jh7110-common-u-boot.dtsi" There is a same story here for Pine64 Star64 about delay values. Refer to: https://patchwork.ozlabs.org/project/uboot/list/?series=429906 "riscv64: dts: starfive: Star64 ethernet0 phy delay values sync with upstream Linux" https://lore.kernel.org/lkml/20241023-guts-versus-1a2bcfdfbec2@spud/ "[PATCH] riscv: dts: starfive: Update ethernet phy0 delay parameter values for Star64" It is your choice if you want to duplicate the upstream patch here to change the property nodes (or not) until the next dts sync from upstream, or cherry-pick a dts sync (when that becomes possible after upstream makes this available). The problem affects only ethernet0 which is well-known as "does not work, try a different network port" and so it is not any trouble to just ignore the problem here, making this fix now creates more work for us in the future. Star64 has a working secondary network port ethernet1 and so no change is requested from me. The phy delay value patch for U-Boot and Star64 can be dropped in favor of the OF_UPSTREAM series and any action or non-action you decide for this. > diff --git a/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a-u-boot.dtsi > b/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a-u-boot.dtsi > new file mode 100644 > index 0000000000..9df1e5db55 > --- /dev/null > +++ b/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a-u-boot.dtsi > @@ -0,0 +1,6 @@ > +// SPDX-License-Identifier: GPL-2.0 OR MIT > +/* > + * Copyright (C) 2024 StarFive Technology Co., Ltd. > + */ > + > +#include "jh7110-common-u-boot.dtsi" > -- > 2.43.2 >
