Hi Heiko, On 2024-11-21 15:27, Heiko Stuebner wrote: > Currently the sdram code for arm64 expects CFG_SYS_SDRAM_BASE to be 0. > The ram being in front and the device-area behind it. > > The upcoming RK3576 uses a different layout, with the device area > in front the ram, which then also extends past the 4G mark. > > Adapt both the generic zone definitions as well as the ATAG parser > to be usable on devices where CFG_SYS_SDRAM_BASE is not 0. > > Signed-off-by: Heiko Stuebner <[email protected]> > --- > arch/arm/mach-rockchip/sdram.c | 10 +++++----- > 1 file changed, 5 insertions(+), 5 deletions(-) > > diff --git a/arch/arm/mach-rockchip/sdram.c b/arch/arm/mach-rockchip/sdram.c > index 1fb01e1c4b1..4e2af55d6e1 100644 > --- a/arch/arm/mach-rockchip/sdram.c > +++ b/arch/arm/mach-rockchip/sdram.c > @@ -181,9 +181,9 @@ static int rockchip_dram_init_banksize(void) > * BL31 (TF-A) reserves the first 2MB but DDR_MEM tag may not > * have it, so force this space as reserved. > */ > - if (start_addr < SZ_2M) { > - size -= SZ_2M - start_addr; > - start_addr = SZ_2M; > + if (start_addr < SZ_2M + CFG_SYS_SDRAM_BASE) { > + size -= SZ_2M - (start_addr - CFG_SYS_SDRAM_BASE); > + start_addr = SZ_2M + CFG_SYS_SDRAM_BASE;
For consistency these should be changed to CFG_SYS_SDRAM_BASE + SZ_2M. > } > > /* > @@ -228,7 +228,7 @@ static int rockchip_dram_init_banksize(void) > return -EINVAL; > } > > - size -= rsrv_end - start_addr; > + size -= rsrv_end - (start_addr - > CFG_SYS_SDRAM_BASE); > start_addr = rsrv_end; > break; > } > @@ -302,7 +302,7 @@ int dram_init_banksize(void) > ret); > > /* Reserve 0x200000 for ATF bl31 */ > - gd->bd->bi_dram[0].start = 0x200000; > + gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE + 0x200000; This can be changed to SZ_2M instead of 0x200000 and 2M in the comment. > gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start; > > /* Add usable memory beyond the blob of space for peripheral near 4GB */ Beside above nitpicks this is Reviewed-by: Jonas Karlman <[email protected]> Regards, Jonas
