On Mon, 2025-01-27 at 14:40 +0100, Christian Marangi wrote:
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>
> From: John Crispin <j...@phrozen.org>
>
> Add USB PHY nodes for MT7981. These are needed for USB support and
> also
> for PCIe support as the u3 PHY can also be used for PHY.
>
> Signed-off-by: John Crispin <j...@phrozen.org>
> Signed-off-by: Christian Marangi <ansuels...@gmail.com>
> ---
> arch/arm/dts/mt7981.dtsi | 48
> ++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 48 insertions(+)
>
> diff --git a/arch/arm/dts/mt7981.dtsi b/arch/arm/dts/mt7981.dtsi
> index b2c4cd7b54a..2360c6bbdca 100644
> --- a/arch/arm/dts/mt7981.dtsi
> +++ b/arch/arm/dts/mt7981.dtsi
> @@ -6,6 +6,7 @@
>
> #include <dt-bindings/interrupt-controller/irq.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/phy/phy.h>
> #include <dt-bindings/clock/mt7981-clk.h>
> #include <dt-bindings/reset/mt7629-reset.h>
> #include <dt-bindings/pinctrl/mt65xx.h>
> @@ -315,4 +316,51 @@
> status = "disabled";
> };
>
> + xhci: xhci@11200000 {
> + compatible = "mediatek,mt7981-xhci",
> + "mediatek,mtk-xhci";
> + reg = <0x11200000 0x2e00>,
> + <0x11203e00 0x0100>;
> + reg-names = "mac", "ippc";
> + interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
> + phys = <&u2port0 PHY_TYPE_USB2>,
> + <&u3port0 PHY_TYPE_USB3>;
> + clocks = <&infracfg CLK_INFRA_IUSB_SYS_CK>,
> + <&infracfg CLK_INFRA_IUSB_CK>,
> + <&infracfg CLK_INFRA_IUSB_133_CK>,
> + <&infracfg CLK_INFRA_IUSB_66M_CK>,
> + <&topckgen CLK_TOP_U2U3_XHCI_SEL>;
> + clock-names = "sys_ck",
> + "ref_ck",
> + "mcu_ck",
> + "dma_ck",
> + "xhci_ck";
> + mediatek,u3p-dis-msk = <0x1>;
> + status = "okay";
> + };
> +
> + usbtphy: usb-phy@11e10000 {
> + compatible = "mediatek,mt7981",
> + "mediatek,generic-tphy-v2";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + status = "okay";
> +
> + u2port0: usb-phy@11e10000 {
> + reg = <0x11e10000 0x700>;
> + clocks = <&topckgen CLK_TOP_USB_FRMCNT_SEL>;
> + clock-names = "ref";
> + #phy-cells = <1>;
> + status = "okay";
> + };
> +
> + u3port0: usb-phy@11e10700 {
> + reg = <0x11e10700 0x900>;
> + clocks = <&topckgen CLK_TOP_USB3_PHY_SEL>;
> + clock-names = "ref";
> + #phy-cells = <1>;
> + mediatek,syscon-type = <&topmisc 0x218 0>;
> + status = "okay";
> + };
> + };
> };
> --
> 2.47.1
>
Thanks!
Reviewed-by: Weijie Gao <weijie....@mediatek.com>
Tested-by: Weijie Gao <weijie....@mediatek.com>
