SST(sst26wf016) flashes have multiple erase block sizes, including
8 KB, 32 KB, and 64 KB. Since a 64 KB sector erase cannot be performed
on all blocks, the 4 KB sector erase command should be used instead.
Enabling the SPI_FLASH_USE_4K_SECTORS configuration allows the use of
4 KB sector erases, but it may increase the erase operation time for large
memory flashes.

This reverts commit 34cd4a72fb2d113e2754c0d643618a8e3fa549ab

MEMORY ORGANIZATION:
The SST26WF016B/016BA SQI memory array is organized
in uniform, 4 KByte erasable sectors with the following
erasable blocks: eight 8 KByte parameter, two
32 KByte overlay, and thirty 64 KByte overlay blocks.
See Figure 3-1.

Top of Memory Block
┌──────────┐
│  8 KByte │
├──────────┤
│  8 KByte │
├──────────┤
│  8 KByte │
├──────────┤
│  8 KByte │
├──────────┤
│ 32 KByte │
├──────────┤
│ 64 KByte │
├──────────┤
│ 64 KByte │
├──────────┤
│ 64 KByte │
├──────────┤
│ 32 KByte │
├──────────┤
│  8 KByte │
├──────────┤
│  8 KByte │
├──────────┤
│  8 KByte │
├──────────┤
│  8 KByte │
└──────────┘
Bottom of Memory Block

      ┌────────────────────────────────┐
      │            64 KByte            │
      ├────────────────────────────────┤
      │            64 KByte            │
      └────────────────────────────────┘

      Expanded View:
      ┌──────┐ ┌──────┐ ┌──────┐ ┌──────┐
      │ 4 KB │ │ 4 KB │ │ 4 KB │ │ 4 KB │
      ├──────┤ ├──────┤ ├──────┤ ├──────┤
      │  . .  .  (continues) . .  .   │
      └──────┘ └──────┘ └──────┘ └──────┘

2 Sectors for 8 KByte blocks
8 Sectors for 32 KByte blocks
16 Sectors for 64 KByte blocks

data sheet:
chrome-extension://efaidnbmnnnibpcajpcglclefindmkaj/https://ww1.microchip.com/downloads/en/DeviceDoc/20005013D.pdf

Signed-off-by: Prasad Kummari <[email protected]>
---
 drivers/mtd/spi/spi-nor-core.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 6f352c5c0e2..43ca2e9d97b 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -3592,6 +3592,19 @@ static int spi_nor_select_erase(struct spi_nor *nor,
                        mtd->erasesize = info->sector_size;
        }
 
+       if ((JEDEC_MFR(info) == SNOR_MFR_SST) && info->flags & SECT_4K) {
+               nor->erase_opcode = SPINOR_OP_BE_4K;
+               /*
+                * In parallel-memories the erase operation is
+                * performed on both the flashes simultaneously
+                * so, double the erasesize.
+                */
+               if (nor->flags & SNOR_F_HAS_PARALLEL)
+                       mtd->erasesize = 4096 * 2;
+               else
+                       mtd->erasesize = 4096;
+       }
+
        return 0;
 }
 
-- 
2.25.1

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