The TPL image must be built for each board we need to support. It is the
only part of the image which is board-specific.
This helps to save space and reduce the size of TPL, so that it can fit
within the internal 192K IRAM of the RK3399 SoC.
As with other phases, the TPL devicetree is run through fdtgrep to
remove unwanted nodes and properties and reduce its size.
Signed-off-by: Simon Glass <s...@chromium.org>
---
(no changes since v2)
Changes in v2:
- Mention RK3399 with respect to the memory limit
- Move VPL things into a separate file
arch/arm/dts/rockchip-u-boot.dtsi | 2 ++
arch/arm/dts/rockchip-vpl-u-boot.dtsi | 16 ++++++++++++++++
2 files changed, 18 insertions(+)
diff --git a/arch/arm/dts/rockchip-u-boot.dtsi
b/arch/arm/dts/rockchip-u-boot.dtsi
index ef1f24fe29c..366d52de4ee 100644
--- a/arch/arm/dts/rockchip-u-boot.dtsi
+++ b/arch/arm/dts/rockchip-u-boot.dtsi
@@ -159,6 +159,7 @@
filename = "u-boot-rockchip.bin";
pad-byte = <0xff>;
+#ifndef CONFIG_VPL
mkimage {
filename = "idbloader.img";
args = "-n", CONFIG_SYS_SOC, "-T", "rksd";
@@ -184,6 +185,7 @@
#endif
offset = <CONFIG_SPL_PAD_TO>;
};
+#endif /* VPL */
fdtmap {
};
diff --git a/arch/arm/dts/rockchip-vpl-u-boot.dtsi
b/arch/arm/dts/rockchip-vpl-u-boot.dtsi
index eee57db5478..5367a40c543 100644
--- a/arch/arm/dts/rockchip-vpl-u-boot.dtsi
+++ b/arch/arm/dts/rockchip-vpl-u-boot.dtsi
@@ -111,6 +111,22 @@
};
simple-bin {
+ alternates-fdt {
+ fdt-list-dir = "dts/upstream/src/arm64/rockchip";
+ filename-pattern = "alt-NAME.bin";
+ fdt-phase = "tpl";
+
+ mkimage {
+ filename = "idbloader.img";
+ args = "-n", CONFIG_SYS_SOC, "-T", "rksd";
+ multiple-data-files;
+
+ u-boot-tpl {
+ symbols-base = <0>;
+ };
+ };
+ };
+
vpl {
type = "fit";
offset = <(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR *
0x200 + 0x8000)>;
--
2.43.0
