From: Magnus Damm <d...@opensource.se>
Add r7s72100 Genmai board support. Serial console, NOR Flash and
Ethernet are known to work however on-board SDRAM is not yet enabled.
Signed-off-by: Magnus Damm <d...@opensource.se>
---
Changes since v1:
- Include fixup changes from Marek, thank you.
- Rebase on top of u-boot next and patches from Marek.
- The defconfig has been updated to use
CONFIG_POSITION_INDEPENDENT=y and CONFIG_SYS_TEXT_BASE=0x0
arch/arm/dts/Makefile | 1
arch/arm/dts/r7s72100-genmai-u-boot.dtsi | 32 +++++++++++++++++++
arch/arm/mach-renesas/Kconfig.rza1 | 4 ++
board/renesas/genmai/Kconfig | 12 +++++++
board/renesas/genmai/MAINTAINERS | 5 +++
board/renesas/genmai/Makefile | 7 ++++
board/renesas/genmai/genmai.c | 49 ++++++++++++++++++++++++++++++
configs/genmai_defconfig | 17 ++++++++++
include/configs/genmai.h | 15 +++++++++
9 files changed, 142 insertions(+)
--- 0001/arch/arm/dts/Makefile
+++ work/arch/arm/dts/Makefile 2025-07-02 22:41:57.823241689 +0900
@@ -924,6 +924,7 @@ dtb-$(CONFIG_ARCH_IMXRT) += imxrt1020-ev
imxrt1170-evk.dtb \
dtb-$(CONFIG_RZA1) += \
+ r7s72100-genmai.dtb \
r7s72100-gr-peach.dtb
dtb-$(CONFIG_TARGET_AT91SAM9261EK) += at91sam9261ek.dtb
--- /dev/null
+++ work/arch/arm/dts/r7s72100-genmai-u-boot.dtsi 2025-07-02
22:41:57.823241689 +0900
@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source extras for U-Boot for the Genmai board
+ * Based on GR Peach, Copyright (C) 2019 Marek Vasut <marek.va...@gmail.com>
+ */
+
+/ {
+ soc {
+ bootph-all;
+ };
+};
+
+&bsc {
+ bootph-all;
+};
+
+&ostm0 {
+ bootph-all;
+};
+
+&pinctrl {
+ bootph-all;
+};
+
+&scif2 {
+ bootph-all;
+ clock = <66666666>; /* ToDo: Replace by DM clock driver */
+};
+
+&scif2_pins {
+ bootph-all;
+};
--- 0001/arch/arm/mach-renesas/Kconfig.rza1
+++ work/arch/arm/mach-renesas/Kconfig.rza1 2025-07-02 22:41:57.823241689
+0900
@@ -14,12 +14,16 @@ choice
prompt "Renesas RZ/A1 board select"
# Renesas Supported Boards
+config TARGET_GENMAI
+ bool "GENMAI board"
+
config TARGET_GRPEACH
bool "GR-PEACH board"
endchoice
# Renesas Supported Boards
+source "board/renesas/genmai/Kconfig"
source "board/renesas/grpeach/Kconfig"
endif
--- /dev/null
+++ work/board/renesas/genmai/Kconfig 2025-07-02 22:39:54.701474070 +0900
@@ -0,0 +1,12 @@
+if TARGET_GENMAI
+
+config SYS_BOARD
+ default "genmai"
+
+config SYS_VENDOR
+ default "renesas"
+
+config SYS_CONFIG_NAME
+ default "genmai"
+
+endif
--- /dev/null
+++ work/board/renesas/genmai/MAINTAINERS 2025-07-02 22:41:57.823241689
+0900
@@ -0,0 +1,5 @@
+GENMAI BOARD
+M: Magnus Damm <d...@opensource.se>
+S: Maintained
+F: arch/arm/dts/r7s72100*
+N: genmai
--- /dev/null
+++ work/board/renesas/genmai/Makefile 2025-07-02 22:41:57.823241689 +0900
@@ -0,0 +1,7 @@
+#
+# Copyright (C) 2025 Magnus Damm <d...@opensource.se>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y := genmai.o
--- /dev/null
+++ work/board/renesas/genmai/genmai.c 2025-07-02 22:43:27.465800567 +0900
@@ -0,0 +1,49 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2025 Magnus Damm <d...@opensource.se>
+ */
+
+#include <init.h>
+#include <asm/global_data.h>
+#include <asm/io.h>
+
+#define RZA1_BCR_BASE 0x3FFFC000
+#define CS0BCR (RZA1_BCR_BASE + 0x04)
+#define CS0WCR (RZA1_BCR_BASE + 0x28)
+#define CS1BCR (RZA1_BCR_BASE + 0x08)
+#define CS1WCR (RZA1_BCR_BASE + 0x2c)
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+ gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
+
+ /* setup NOR Flash on CS0 and CS1 */
+ writel(0x00000b40, CS0WCR);
+ writel(0x10000c00, CS0BCR);
+ writel(0x00000b40, CS1WCR);
+ writel(0x10000c00, CS1BCR);
+ return 0;
+}
+
+/*
+ * The Genmai DT will most likely contain memory nodes describing the external
+ * SDRAM memory connected to CS2 and CS3, however we do not yet have any code
+ * in U-Boot to setup the memory controller. For now ignore DT and make use of
+ * the RZ/A1H on-chip memory which is 10 MiB at CFG_SYS_SDRAM_BASE.
+ */
+
+int dram_init(void)
+{
+ gd->ram_base = CFG_SYS_SDRAM_BASE;
+ gd->ram_size = 10 << 20;
+ return 0;
+}
+
+int dram_init_banksize(void)
+{
+ gd->bd->bi_dram[0].start = gd->ram_base;
+ gd->bd->bi_dram[0].size = gd->ram_size;
+ return 0;
+}
--- /dev/null
+++ work/configs/genmai_defconfig 2025-07-03 00:46:55.755261108 +0900
@@ -0,0 +1,17 @@
+#include <configs/renesas_rza1.config>
+
+CONFIG_ARM=y
+CONFIG_ARCH_RENESAS=y
+CONFIG_TEXT_BASE=0x00000000
+CONFIG_POSITION_INDEPENDENT=y
+CONFIG_DEFAULT_DEVICE_TREE="renesas/r7s72100-genmai"
+CONFIG_TARGET_GENMAI=y
+
+CONFIG_ENV_IS_IN_MTD=y
+CONFIG_ENV_MTD_DEV="nor0"
+CONFIG_ENV_OFFSET=0x80000
+CONFIG_ENV_RELOC_GD_ENV_ADDR=y
+CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_ENV_SIZE=0x20000
+CONFIG_MTD=y
+CONFIG_SYS_MAX_FLASH_BANKS=2
--- /dev/null
+++ work/include/configs/genmai.h 2025-07-02 22:41:57.824241695 +0900
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Configuration settings for the Renesas GENMAI board
+ *
+ * Copyright (C) 2017-2019 Renesas Electronics
+ */
+
+#ifndef __GENMAI_H
+#define __GENMAI_H
+
+/* Internal RAM Size (RZ/A1=3M, RZ/A1M=5M, RZ/A1H=10M) */
+#define CFG_SYS_SDRAM_BASE 0x20000000
+#define CFG_SYS_SDRAM_SIZE (10 * 1024 * 1024)
+
+#endif /* __GENAMI_H */
