On Mon, 2025-06-02 at 15:44 -0400, Greg Malysa wrote:
> > &clk {
> > compatible = "adi,sc598-clocks";
> > reg = <0x3108d000 0x1000>,
> > - <0x3108e000 0x1000>,
> > - <0x3108f000 0x1000>,
> > - <0x310a9000 0x1000>;
> > + <0x3108e000 0x1000>,
> > + <0x3108f000 0x1000>,
> > + <0x310a9000 0x1000>;
Could it be that everything is indented with 4 space tabs rather than 8?
> > + gpio_expander1: mcp23018@20 {
> > + compatible = "microchip,mcp23018";
It looks like this corresponds to Rev D of the SOM. There is a Rev E of the SOM
with a adi,adp5588 like on the ezlite and a 1Gb SPI flash. I imagine Rev D is
no longer being manufactured, but I'm waiting to hear back internally at ADI.
Changes for Rev E can be made in another series, but it might be nice to add a
`Link: <...>` to the schematics in the commit message so it is clear which
revision this corresponds to.
> > + uart0 {
> > + gpio-hog;
> > + gpios = <5 GPIO_ACTIVE_HIGH>;
It looks like the PI3C3125 bus switch has active LOW enables. That would
explain why `output-low` and GPIO_ACTIVE_HIGH result in a functional UART.
> > + output-low;
> > + line-name = "~uart0-en";
I couldn't find any other examples of ~ being used as a prefix for `line-name`
in U-Boot or in the Kernel.
> > + bootph-pre-ram;
Unfortunately, SPL doesn't currently configure the GPIO expander before using
the UART so there is no output until U-Boot proper is booted. I did a little
JTAG debugging and neither the GPIO expander was probed, nor the ADI I2C driver.
By probing before the bus switch I could see the following getting output:
U-Boot SPL 2025.07-rc4 (Jul 04 2025 - 13:31:08 +0200)
ADI Boot Mode: 0x0 (JTAG/BOOTROM)
Unfortunately, the ADI UART driver does not support DEBUG_UART. I also tried
adding devicetree entries for uart2 (which is routed to the carrier board)
without luck.
Ideally, this would be documented somewhere, otherwise anyone booting SPL over
JTAG may think something is wrong.
