From: Andreas Dannenberg <dannenb...@ti.com> Enable cache for AM62p to optimize performance of CPU to access data from memory.
Reviewed-by: Alexander Sverdlin <alexander.sverd...@siemens.com> Signed-off-by: Andreas Dannenberg <dannenb...@ti.com> Signed-off-by: Chintan Vankar <c-van...@ti.com> --- Link to v3: https://lore.kernel.org/u-boot/20250225114903.2080616-10-c-van...@ti.com/ Changes from v3 to v4: - Collected Reviewed-by from Alexander Sverdlin. board/ti/am62px/evm.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/board/ti/am62px/evm.c b/board/ti/am62px/evm.c index 2e85363cf5f..c06e3878d67 100644 --- a/board/ti/am62px/evm.c +++ b/board/ti/am62px/evm.c @@ -9,6 +9,7 @@ #include <efi_loader.h> #include <asm/arch/hardware.h> #include <asm/io.h> +#include <cpu_func.h> #include <dm/uclass.h> #include <env.h> #include <fdt_support.h> @@ -41,6 +42,13 @@ struct efi_capsule_update_info update_info = { .images = fw_images, }; +#if IS_ENABLED(CONFIG_SPL_BUILD) +void spl_board_init(void) +{ + enable_caches(); +} +#endif + #if defined(CONFIG_XPL_BUILD) void spl_perform_fixups(struct spl_image_info *spl_image) { -- 2.34.1
