Am 18.08.25 um 12:06 schrieb Mikhail Kshevetskiy: > The code was ported from linux-6.12. The original continuous reading > support was implemented by Miquel Raynal <miquel.ray...@bootlin.com> > in linux commit 631cfdd0520d (mtd: spi-nand: Add continuous read support). > > Here is an original patch description: > -------------------------------------- > A regular page read consist in: > - Asking one page of content from the NAND array to be loaded in the > chip's SRAM, > - Waiting for the operation to be done, > - Retrieving the data (I/O phase) from the chip's SRAM. > > When reading several sequential pages, the above operation is repeated > over and over. There is however a way to optimize these accesses, by > enabling continuous reads. The feature requires the NAND chip to have a > second internal SRAM area plus a bit of additional internal logic to > trigger another internal transfer between the NAND array and the second > SRAM area while the I/O phase is ongoing. Once the first I/O phase is > done, the host can continue reading more data, continuously, as the chip > will automatically switch to the second SRAM content (which has already > been loaded) and in turns trigger the next load into the first SRAM area > again. > > From an instruction perspective, the command op-codes are different, but > the same cycles are required. The only difference is that after a > continuous read (which is stopped by a CS deassert), the host must > observe a delay of tRST. However, because there is no guarantee in Linux > regarding the actual state of the CS pin after a transfer (in order to > speed-up the next transfer if targeting the same device), it was > necessary to manually end the continuous read with a configuration > register write operation. > > Continuous reads have two main drawbacks: > * They only work on full pages (column address ignored) > * Only the main data area is pulled, out-of-band bytes are not > accessible. Said otherwise, the feature can only be useful with on-die > ECC engines. > > Performance wise, measures have been performed on a Zynq platform using > Macronix SPI-NAND controller with a Macronix chip (based on the > flash_speed tool modified for testing sequential reads): > - 1-1-1 mode: performances improved from +3% (2-pages) up to +10% after > a dozen pages. > - 1-1-4 mode: performances improved from +15% (2-pages) up to +40% after > a dozen pages. > > This series is based on a previous work from Macronix engineer Jaime > Liao. > -------------------------------------- > > Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevets...@iopsys.eu>
Reviewed-by: Frieder Schrempf <frieder.schre...@kontron.de>
