From: Ricardo Simoes <ricardo.sim...@pt.bosch.com>

Following the work done in commit 7f39ad5a, this commit adds definitions
for PWM2, PWM3, and PWM4 clocks. Allowing one to use these PWM modules
together with DM_CLK.

Note that the solution was verified only against PWM3.

Signed-off-by: Ricardo Simoes <ricardo.sim...@pt.bosch.com>
Signed-off-by: Mark Jonas <mark.jo...@de.bosch.com>
---
 drivers/clk/imx/clk-imx6q.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/clk/imx/clk-imx6q.c b/drivers/clk/imx/clk-imx6q.c
index 13239f2f64d..b69355cefc7 100644
--- a/drivers/clk/imx/clk-imx6q.c
+++ b/drivers/clk/imx/clk-imx6q.c
@@ -156,6 +156,12 @@ static int imx6q_clk_probe(struct udevice *dev)
               imx_clk_gate2(dev, "i2c3", "ipg_per", base + 0x70, 10));
        clk_dm(IMX6QDL_CLK_PWM1,
               imx_clk_gate2(dev, "pwm1", "ipg_per", base + 0x78, 16));
+       clk_dm(IMX6QDL_CLK_PWM2,
+              imx_clk_gate2(dev, "pwm2", "ipg_per", base + 0x78, 18));
+       clk_dm(IMX6QDL_CLK_PWM3,
+              imx_clk_gate2(dev, "pwm3", "ipg_per", base + 0x78, 20));
+       clk_dm(IMX6QDL_CLK_PWM4,
+              imx_clk_gate2(dev, "pwm4", "ipg_per", base + 0x78, 22));
 
        clk_dm(IMX6QDL_CLK_ENET, imx_clk_gate2(dev, "enet", "ipg", base + 0x6c, 
10));
        clk_dm(IMX6QDL_CLK_ENET_REF,
-- 
2.34.1

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