On 9/30/25 14:41, Stefan Roese wrote:
On 9/29/25 23:49, Tony Dinh wrote:
Correct the memory and IO mbus windows size increments in
mvebu_pcie_bind.
Currently, pcie1 controller resource_size(&mem) and resource_size(&io)
checks result in a failure. This is because mem.end and io.end must be
incremented at the end of pcie0 windows assignment.
Signed-off-by: Tony Dinh <[email protected]>
---
drivers/pci/pci_mvebu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/pci/pci_mvebu.c b/drivers/pci/pci_mvebu.c
index 77815513b76..3985bd59607 100644
--- a/drivers/pci/pci_mvebu.c
+++ b/drivers/pci/pci_mvebu.c
@@ -763,6 +763,7 @@ static int mvebu_pcie_bind(struct udevice *parent)
pcie->mem.start = mem.start;
pcie->mem.end = mem.start + SZ_128M - 1;
mem.start += SZ_128M;
+ mem.end = mem.start + SZ_128M - 1;
Reviewed-by: Stefan Roese <[email protected]>
Applied to u-boot-marvell/master
Thanks,
Stefan
