Prune overrides of upstream jh7110.dtsi now that the required nodes are available through the devicetree-rebasing subtree.
Signed-off-by: E Shattow <[email protected]> --- Depends on "dts: starfive: cherry-pick jh7110 updates from v6.18-rc1-dts": https://lore.kernel.org/u-boot/[email protected]/ --- .../dts/starfive-visionfive2-u-boot.dtsi | 68 ------------------- 1 file changed, 68 deletions(-) diff --git a/arch/riscv/dts/starfive-visionfive2-u-boot.dtsi b/arch/riscv/dts/starfive-visionfive2-u-boot.dtsi index 0e5dc3685b2..4c86d285e66 100644 --- a/arch/riscv/dts/starfive-visionfive2-u-boot.dtsi +++ b/arch/riscv/dts/starfive-visionfive2-u-boot.dtsi @@ -3,74 +3,6 @@ * Copyright (C) 2022 StarFive Technology Co., Ltd. */ -// BEGIN "riscv: dts: starfive: jh7110: bootph-pre-ram hinting needed by boot loader" -// From upstream Linux conor/riscv-dt-for-next commit 8181cc2f3f21 - -#include <dt-bindings/reset/starfive,jh7110-crg.h> - -&clint { - bootph-pre-ram; -}; - -&cpu0_intc { - bootph-pre-ram; -}; - -&cpu1_intc { - bootph-pre-ram; -}; - -&cpu2_intc { - bootph-pre-ram; -}; - -&cpu3_intc { - bootph-pre-ram; -}; - -&cpu4_intc { - bootph-pre-ram; -}; - -&osc { - bootph-pre-ram; -}; - -&gmac1_rgmii_rxin { - bootph-pre-ram; -}; - -&gmac1_rmii_refin { - bootph-pre-ram; -}; - -/ { - soc { - memory-controller@15700000 { - compatible = "starfive,jh7110-dmc"; - reg = <0x0 0x15700000 0x0 0x10000>, - <0x0 0x13000000 0x0 0x10000>; - bootph-pre-ram; - clocks = <&syscrg JH7110_PLLCLK_PLL1_OUT>; - clock-names = "pll"; - resets = <&syscrg JH7110_SYSRST_DDR_AXI>, - <&syscrg JH7110_SYSRST_DDR_OSC>, - <&syscrg JH7110_SYSRST_DDR_APB>; - reset-names = "axi", "osc", "apb"; - }; - }; -}; - -&syscrg { - bootph-pre-ram; -}; - -&pllclk { - bootph-pre-ram; -}; - -// END "riscv: dts: starfive: jh7110: bootph-pre-ram hinting needed by boot loader" - / { soc { memory-controller@15700000 { -- 2.50.0
