On 2025/10/29 00:57, Quentin Schulz wrote:
From: Quentin Schulz <[email protected]>
The free running mode is 0 at bit offset 1. User mode is 1 at bit offset
1. Currently, free running mode is 1 at offset 0, which is already the
case thanks to TIME_EN.
So, this essentially does not change the actual value written to the
register as it is TIME_EN | TIMER_FMODE which currently is 0x1 | BIT(0)
= 0b1, and will become 0x1 | (0 << 1) = 0b1.
Signed-off-by: Quentin Schulz <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
Thanks,
- Kever
---
arch/arm/mach-rockchip/rk3399/rk3399.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c
b/arch/arm/mach-rockchip/rk3399/rk3399.c
index 43d151708e4..8687a9347ec 100644
--- a/arch/arm/mach-rockchip/rk3399/rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
@@ -61,8 +61,8 @@ struct mm_region *mem_map = rk3399_mem_map;
#define TIMER_CONTROL_REG 0x1c
#define TIMER_EN 0x1
-#define TIMER_FMODE BIT(0)
-#define TIMER_RMODE BIT(1)
+#define TIMER_FMODE (0 << 1)
+#define TIMER_RMODE (1 << 1)
void rockchip_stimer_init(void)
{
