Hi, this series introduces support to resume from IO+DDR. IO+DDR is a low power mode of am62a and am62p in which nearly everything is powered off except DDR which is in self-refresh and a few pins which detect activity and can wakeup the system again.
On resume uboot SPL is loaded and checks if this is a IO+DDR resume. If it is, the DDR initialization sequence in k3-ddrss differs slightly as it has to get the DDR out of the self-refresh. Afterward a specific address determined from DT is used to get the metadata that stores relevant context addresses. The context is restored using the tisci message TI_SCI_MSG_MIN_CONTEXT_RESTORE. At the end all further initializations are skipped and uboot SPL directly jumps into the DM resume address which takes care of the rest. k3-ddrss is using absolute register accesses at the moment. I am trying to submit syscon DT patches upstream to access these through syscon, unfortunately there is ongoing discussion regarding syscon. I tested this on am62a. Best, Markus Signed-off-by: Markus Schneider-Pargmann (TI.com) <[email protected]> --- Changes in v6: - Add comment for last part of removing can io isolation - Only mention a single kconfig symbol in the commit message - Add defines for timeouts in k3-ddrss - Link to v5: https://lore.kernel.org/r/20251110-topic-am62-ioddr-v2025-04-rc1-v5-0-980ee0036...@baylibre.com Changes in v5: - Fixed compile warnings - Link to v4: https://lore.kernel.org/r/20251030-topic-am62-ioddr-v2025-04-rc1-v4-0-4cef18af0...@baylibre.com Changes in v4: - Copy lpm_meta_data into the stack to be able to debug unstable memory issues - Add missing comments about ctx_lo and ctx_hi - Use absolute addresses for k3-ddrss CANUART_WAKE_STAT1 and CANUART_WAKE_OFF_MODE_STAT to avoid using addresses outside of the range given in the devicetree - Remove the cherry picked devicetree patches as they are already included now - In lpm_resume_from_ddr() print upper and lower 32bit of the meta data values separately. - Link to v3: https://lore.kernel.org/r/20250623-topic-am62-ioddr-v2025-04-rc1-v3-0-a4da322c1...@baylibre.com Changes in v3: - Use wait_for_bit helpers in k3-ddrss where possible and add panic messages for easier debugging - Link to v2: https://lore.kernel.org/r/20250613-topic-am62-ioddr-v2025-04-rc1-v2-0-3d233aaea...@baylibre.com Changes in v2: - Remove 'default n' from K3_IODDR - Pick devicetree patches from upstream instead of mailinglist - Link to v1: https://lore.kernel.org/r/20250311-topic-am62-ioddr-v2025-04-rc1-v1-0-666de9c10...@baylibre.com --- Markus Schneider-Pargmann (TI.com) (13): arm: mach-k3: Remove CANUART IO isolation arm: mach-k3: Kconfig: Add symbol for IO+DDR Low Power Mode ram: k3-ddrss: Add support for DDR in self-refresh firmware: ti_sci: Add TI_SCI_MSG_MIN_CONTEXT_RESTORE arm: mach-k3: common: Add CANUART wakeup check helpers arm: mach-k3: common: Add lpm_resume_from_ddr arm: mach-k3: common: Helper for LPM meta data address from DT arm: mach-k3: am62a7_init: Resume on LPM exit arm: mach-k3: am62p5_init: Resume on LPM exit arm: dts: k3-am62a: Add r5 device nodes arm: dts: k3-am62p: Add r5 device nodes configs: am62ax_evm_r5: Enable IODDR resume support configs: am62p_evm_r5_defconfig: Enable IODDR resume support arch/arm/dts/k3-am62a7-sk-u-boot.dtsi | 16 +++ arch/arm/dts/k3-am62p5-sk-u-boot.dtsi | 20 ++++ arch/arm/mach-k3/Kconfig | 8 ++ arch/arm/mach-k3/am62ax/am62a7_init.c | 11 ++ arch/arm/mach-k3/am62px/am62p5_init.c | 12 +++ arch/arm/mach-k3/am62x/am625_init.c | 2 + arch/arm/mach-k3/common.c | 167 ++++++++++++++++++++++++++++ arch/arm/mach-k3/common.h | 4 + arch/arm/mach-k3/include/mach/hardware.h | 32 ++++++ configs/am62ax_evm_r5_defconfig | 1 + configs/am62px_evm_r5_defconfig | 1 + drivers/firmware/ti_sci.c | 38 +++++++ drivers/firmware/ti_sci.h | 16 +++ drivers/ram/k3-ddrss/k3-ddrss.c | 180 +++++++++++++++++++++++++++++++ include/linux/soc/ti/ti_sci_protocol.h | 9 ++ 15 files changed, 517 insertions(+) --- base-commit: e34d01d23e45e007368685ffa6dfd674b6dd7b17 change-id: 20250306-topic-am62-ioddr-v2025-04-rc1-0b3a0ffe92b1 Best regards, -- Markus Schneider-Pargmann (TI.com) <[email protected]>
