On 11/25/25 1:00 AM, Heinrich Schuchardt wrote:
On 11/13/25 04:03, [email protected] wrote:
From: Dinesh Maniyam <[email protected]>
Guard the Bad Block Table (BBT) scanning with `#ifndef CONFIG_SPL_BUILD`
Thank you for looking into this issue.
In the patch you use CONFIG_XPL_BUILD not CONFIG_SPL_BUILD.
to prevent running `chip->scan_bbt()` in SPL builds.
The SPL only requires basic NAND read functionality to load the next
stage and does not need full BBT management. Running the BBT scan in
SPL unnecessarily increases code size, memory usage, and boot time.
This change ensures the BBT is scanned only in U-Boot proper, where the
full NAND subsystem and dynamic memory are available.
How do you guarantee that the content that you read from the NAND is not
corrupted, or read from already spent cells, or is even aligned with
what U-Boot would read after scanning the BBT ? NAND suffers from
considerable bitflips and short cell erase cycle count, the bad block
table scanning is very likely mandatory. Disabling it because it
increases code complexity and size is not a good reason for disabling it.
