Hi Brian,
On 11/25/25 1:38 PM, Brian Sune wrote:
New SPL introduce cyclic and without initial
the interrupt of SDRAM calibration could fail.
Are you even sure SPL_CYCLIC is required? Wouldn't enabling CYCLIC be
enough?
Since you have not identified the root issue yet, can you please provide
the actual defconfig used before this change so we can figure out what
is happening, if other boards are impacted and how to fix it properly so
this possible misconfiguration cannot happen anymore?
Initialize the default CYCLIC setup fix it.
Signed-off-by: Brian Sune <[email protected]>
---
arch/arm/mach-socfpga/Kconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
index f2e959b5662..a06b677787d 100644
--- a/arch/arm/mach-socfpga/Kconfig
+++ b/arch/arm/mach-socfpga/Kconfig
@@ -117,6 +117,9 @@ config TARGET_SOCFPGA_CYCLONE5
config TARGET_SOCFPGA_GEN5
bool
+ select CMD_CYCLIC
I don't think you **need** a U-Boot command to be available to unbreak
your device?
Cheers,
Quentin
