On 11/10/25 13:33, Michal Simek wrote:
When CLK_AUTO_ID is enabled 8 higher bits of clk->id is unique clock
identifier in clk uclass that's why it is necessary to mask lower bits
which are clock ID.
Also check that ID not bigger then maximum supported clock.
Signed-off-by: Michal Simek <[email protected]>
---
drivers/clk/clk_versal.c | 16 +++++++++++++---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/clk_versal.c b/drivers/clk/clk_versal.c
index 339676f1e4f4..139f429d609b 100644
--- a/drivers/clk/clk_versal.c
+++ b/drivers/clk/clk_versal.c
@@ -731,10 +731,13 @@ static int versal_clk_probe(struct udevice *dev)
static ulong versal_clk_get_rate(struct clk *clk)
{
struct versal_clk_priv *priv = dev_get_priv(clk->dev);
- u32 id = clk->id;
+ u32 id = clk_get_id(clk);
u32 clk_id;
u64 clk_rate = 0;
+ if (id >= clock_max_idx)
+ return -ENODEV;
+
debug("%s\n", __func__);
clk_id = priv->clk[id].clk_id;
@@ -747,7 +750,7 @@ static ulong versal_clk_get_rate(struct clk *clk)
static ulong versal_clk_set_rate(struct clk *clk, ulong rate)
{
struct versal_clk_priv *priv = dev_get_priv(clk->dev);
- u32 id = clk->id;
+ u32 id = clk_get_id(clk);
u32 clk_id;
u64 clk_rate = 0;
u32 div;
@@ -755,6 +758,9 @@ static ulong versal_clk_set_rate(struct clk *clk, ulong
rate)
debug("%s\n", __func__);
+ if (id >= clock_max_idx)
+ return -ENODEV;
+
clk_id = priv->clk[id].clk_id;
ret = versal_clock_get_rate(clk_id, &clk_rate);
@@ -785,9 +791,13 @@ static ulong versal_clk_set_rate(struct clk *clk, ulong
rate)
static int versal_clk_enable(struct clk *clk)
{
struct versal_clk_priv *priv = dev_get_priv(clk->dev);
+ u32 id = clk_get_id(clk);
u32 clk_id;
- clk_id = priv->clk[clk->id].clk_id;
+ if (id >= clock_max_idx)
+ return -ENODEV;
+
+ clk_id = priv->clk[id].clk_id;
if (versal_clock_gate(clk_id)) {
return xilinx_pm_request(PM_CLOCK_ENABLE, clk_id, 0, 0, 0,
Applied.
M
