Hi Marek, Thanks for the clarification.
As discussed, I am not reordering the XMC flash list. This v3 only adds the new XM25QH01D entry in the appropriate alphabetical position, without touching the rest of the list. I welcome feedback from the SPI-NOR subsystem maintainers as well. Thanks again for the guidance! Regards, Ssunk --- [PATCH v3] spi-nor: add support for XM25QH01D Add support for the XMC XM25QH01D SPI NOR flash. This device has 1Gbit (128MB) capacity, with 64KB sectors and supports 4KB erase, dual/quad read, and 4-byte opcodes. Datasheet: https://www.xmcwh.com/uploads/958/XM25QH01D_Ver1.0.pdf Changes in v3: - Do NOT reorder the XMC flash list (per Marek’s feedback) - Only add the XM25QH01D entry in the correct sorted position Changes in v2: - Attempted to reorder the list; reverted in v3 Signed-off-by: Ssunk <[email protected]> --- drivers/mtd/spi/spi-nor-ids.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index 0383175beb5..00f78c2aaae 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -595,6 +595,7 @@ const struct flash_info spi_nor_ids[] = { #endif #ifdef CONFIG_SPI_FLASH_XMC /* XMC (Wuhan Xinxin Semiconductor Manufacturing Corp.) */ + { INFO("XM25QH01D", 0x204021, 0, 64 * 1024, 2048, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, { INFO("XM25QH64A", 0x207017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { INFO("XM25QH64C", 0x204017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { INFO("XM25QH128A", 0x207018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, -- 2.34.1
