On 12/3/2025 10:27 PM, Fabio Estevam wrote:
Caution: This is an external email. Please take care when clicking links or
opening attachments. When in doubt, report the message using the 'Report this
email' button
On Tue, Dec 2, 2025 at 7:05 AM Joseph Guo <[email protected]> wrote:
+&usdhc2 {
+ fsl,signal-voltage-switch-extra-delay-ms = <8>;
Why does U-Boot need this property? It doesn't exist in Linux,
Hi Fabio,
USDHC2 is for SD card and its initial stage is at u-boot.
The IO voltage switch from 3.3v to 1.8v need extra 8ms time on some
platform. I also tested without this delay, SD card can work as SD3.0 on
imx91 frdm platform.
I prefer to remain this to avoid potential risk as 91evk 93evk 93frdm
all remain this property.
+};
+
+&fec {
+ compatible = "fsl,imx91-fec", "fsl,imx93-fec", "fsl,imx8mq-fec";
+ phy-reset-gpios = <&pcal6524 16 GPIO_ACTIVE_LOW>;
+ phy-reset-duration = <15>;
+ phy-reset-post-delay = <100>;
Using phy-reset-gpios is considered deprecated.
The PHY reset GPIO should be described inside the MDIO node.
Ok, will change to main dts MDIO node.
+ðphy1 {
+ reset-gpios = <&pcal6524 15 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <15000>;
+ reset-deassert-us = <100000>;
Why is this inside the u-boot.dtsi instead of the main dts?
Can move to main dts.
+#define CFG_SYS_SDRAM_BASE 0x80000000
+#define PHYS_SDRAM 0x80000000
+#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
What about:
#define PHYS_SDRAM_SIZE SIZE_2GB
make sense, will change.
Regards,
Joseph