From: Peng Fan <[email protected]> SPL will adjust VDD_SOC to OD voltage, because some PMIC uses 0.8V as default for VDD_SOC. So need to call the voltage change APIs to avoid ELE Glitch Detection triggered reset.
Signed-off-by: Ye Li <[email protected]> Signed-off-by: Peng Fan <[email protected]> --- board/freescale/imx93_qsb/spl.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/board/freescale/imx93_qsb/spl.c b/board/freescale/imx93_qsb/spl.c index 7d0f225c9b5..9e64714521b 100644 --- a/board/freescale/imx93_qsb/spl.c +++ b/board/freescale/imx93_qsb/spl.c @@ -81,6 +81,8 @@ int power_init_board(void) printf("PMIC: Over Drive Voltage Mode\n"); } + ele_volt_change_start_req(); + if (val & PCA9450_REG_PWRCTRL_TOFF_DEB) { pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, buck_val); pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, buck_val); @@ -89,6 +91,8 @@ int power_init_board(void) pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, buck_val + 0x4); } + ele_volt_change_finish_req(); + /* set standby voltage to 0.65v */ if (val & PCA9450_REG_PWRCTRL_TOFF_DEB) pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0x0); -- 2.51.0
