The firewall block access to pmu sram for non-secure masters by default after reset (0xffffbfff).
Change the pmu lookup configuration to match the default lookup config for ddr and system sram (0xffff3fff) to allow loading TF-A using DMA. Mainline TF-A will re-configure the firewall to use an even less restrictive lookup (0xbffe3ff0), so this change is not expected to have any real security implication. Signed-off-by: Jonas Karlman <[email protected]> --- arch/arm/mach-rockchip/rk3576/rk3576.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/mach-rockchip/rk3576/rk3576.c b/arch/arm/mach-rockchip/rk3576/rk3576.c index a1e8a7572fa4..c17ba418ced5 100644 --- a/arch/arm/mach-rockchip/rk3576/rk3576.c +++ b/arch/arm/mach-rockchip/rk3576/rk3576.c @@ -26,6 +26,9 @@ #define SYS_SGRF_SOC_CON15 0x005C #define SYS_SGRF_SOC_CON20 0x0070 +#define FW_PMU1SGRF_BASE 0x26003000 +#define PMU1SGRF_SLV_LOOKUP0 0x80 + #define FW_SYS_SGRF_BASE 0x26005000 #define SGRF_DOMAIN_CON1 0x4 #define SGRF_DOMAIN_CON2 0x8 @@ -140,6 +143,9 @@ int arch_cpu_init(void) if (!IS_ENABLED(CONFIG_SPL_BUILD)) return 0; + /* Allow pmu sram access for non-secure masters */ + writel(0xffff3fff, FW_PMU1SGRF_BASE + PMU1SGRF_SLV_LOOKUP0); + /* Set the emmc to access ddr memory */ val = readl(FW_SYS_SGRF_BASE + SGRF_DOMAIN_CON2); writel(val | 0x7, FW_SYS_SGRF_BASE + SGRF_DOMAIN_CON2); -- 2.52.0
