Re: [PATCH 00/10] rockchip: Add initial support for RK3506

[Jonas Karlman]

Hi Aaron,

On 1/9/2026 9:23 PM, Aaron Griffith wrote:
> Hello Jonas,
> 
> On Fri, Jan 09, 2026 at 12:49:41AM +0000, Jonas Karlman wrote:
>> This series add initial support for the Rockchip RK3506 SoC.
>>
>> [..]
> #
>> With this series, board DTs and defconfigs it should be possible to boot
>> into U-Boot proper (without OP-TEE) and still have support for MMC,
>> Ethernet, OTP, RNG, LEDs, buttons and USB gadget/host.
> 
> I have a Luckfox Lyra Pi W board (with RK3506B) and a Luckfox Lyra
> (with RK3506G). I've been using the earlier version of this patchset
> for about two weeks to successfully boot Linux on both of these
> boards. I'm excited to see this support heading upstream.
> 
> Using these patches specifically, I can verify that the RNG and LEDs
> work, that it is able to read data from the MMC and USB storage, and
> that it successfully loads and runs a Linux kernel.
> 
> I was not able to get the Ethernet port to work on my Lyra Pi board,
> but that uses your device tree information that is not part of these
> patches (and may be incomplete). The specific failure U-boot reports is:
> 
>     ethernet@ff4d0000 Waiting for PHY auto negotiation to complete.........
>     TIMEOUT !

Thanks for testing these patches!

I did some testing on my Luckfox Lyra Pi W (eMMC) board and also found
similar issues that you report.

These issues mostly seem to be related to firewall for USB OTG1 and
MAC1 (ff4d0000) or DT issues related to Ethernet clocks and pinctrl.

The firewall values before we update them in arch_cpu_init():

  => md.l ff5f0020 5
  ff5f0020: ffffffff ffffffff ffffffff ffffff00  ................
  ff5f0030: ffffffff                             ....

The following firewall values seem to help fix MAC0/1 and USB OTG1:

  => md.l ff5f0020 5
  ff5f0020: ffffffff f00000ff fffffff0 fff0ff00  ................
  ff5f0030: ffffffff                             ....

We could possible set all these to 0 to allow all masters to access
memory, will send a v2 that configures the firewall like above.

Adding something like following to the ethernet-phy nodes seem to solve
the Ethernet issues in U-Boot on my Lyra Pi:

  assigned-clocks = <&cru CLK_MAC_OUT>;
  assigned-clock-rates = <50000000>;
  clocks = <&cru CLK_MAC_OUT>;
  pinctrl-names = "default";
  pinctrl-0 = <&eth_clk0_25m_out>;
    or
  pinctrl-0 = <&eth_clk1_25m_out>;

Vendor DT for Lyra Pi seem to set CLK_MAC_OUT to 25 MHz, but this does
not seem to work in U-Boot and I can not see anything wrong in the clk
driver, so maybe it is meant to be set to 50 MHz.

Will update my rk3506 branch to include these changes and later also
send out a v2 of this series including the firewall fix.

Regards,
Jonas

> 
> So, for what it's worth,
> 
> Tested-by: Aaron Griffith <aar...@gmail.com>
> 
> Thanks,
>  -Aaron