>Can addr actually ever have bit(0) set ? If not, addr & ~0x1ULL is not >needed and you can literally addr = xhci_trb_virt_to_dma(ring->enq_seg, >ring->enqueue) | ring->cycle_state;
You're right. The address is guaranteed to be aligned and bit(0) will always be 0. I'll remove the redundant masking and send a v3 with the simplified logic. Thanks, Anandhakrishnan S
