On January 22, 2026 thus sayeth Anshul Dalal: > This patch refactors the nodes in each board's R5 device-tree to common > SoC level dtsi. No functional change is intended from this patch. > > Signed-off-by: Anshul Dalal <[email protected]> > ---
... > diff --git a/arch/arm/dts/k3-am625-r5.dtsi > b/arch/arm/dts/k3-am625-r5.dtsi > new file mode 100644 > index 00000000000..c509857ac5d > --- /dev/null > +++ b/arch/arm/dts/k3-am625-r5.dtsi > @@ -0,0 +1,88 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Copyright (C) 2026 Texas Instruments Incorporated - https://www.ti.com/ > + */ > + > +/ { > + aliases { > + tick-timer = &main_timer0; > + remoteproc0 = &sysctrler; > + remoteproc1 = &a53_0; > + serial0 = &wkup_uart0; > + serial3 = &main_uart1; > + }; > + > + a53_0: a53@0 { > + compatible = "ti,am654-rproc"; > + reg = <0x00 0x00a90000 0x00 0x10>; > + power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>, > + <&k3_pds 135 TI_SCI_PD_EXCLUSIVE>, > + <&k3_pds 166 TI_SCI_PD_EXCLUSIVE>; > + resets = <&k3_reset 135 0>; > + clocks = <&k3_clks 61 0>, <&k3_clks 135 0>; > + clock-names = "gtc", "core"; > + assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>; > + assigned-clock-parents = <&k3_clks 61 2>; > + assigned-clock-rates = <200000000>, <1200000000>; I wonder if it is time to drop the A53s to 300MHz (the slowest we sell binned parts at) and let the speed grade detection logic speed it up at runtime once we know it is safe to do so. 1.20GHz is not a listed speed we support according to DT[0]. [0] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/ti/k3-am62p5.dtsi#n107 ~Bryan
