Dne četrtek, 29. januar 2026 ob 00:57:16 Srednjeevropski standardni čas je Paul Kocialkowski napisal(a): > From: Paul Kocialkowski <[email protected]> > > Some of the offsets for the DRAM PHY dx delays are wrong (as compared > to the H616 code and the reference binary) since the > mctl_phy_dx_delay0_inner function does not perform the correct > calculation for some of them. > > Introduce a mctl_phy_dx_delay0_inner0 to fix the incorrect offsets and > rename the existing function to mctl_phy_dx_delay0_inner1 for the > offsets it correctly handles. > > Also add memory barriers that are also present in the H616 code while > at it. > > This fixes detection of 4 GiB DRAM on some boards using LPDDR4. > > Signed-off-by: Paul Kocialkowski <[email protected]> > Sponsored-by: MEC Electronics GmbH <https://www.mec.at/>
Acked-by: Jernej Skrabec <[email protected]> Best regards, Jernej
