Hi Fabio,
On 2/8/2026 10:26 PM, Fabio Estevam wrote:
> From: Ye Zhang <[email protected]>
>
> Add pinctrl driver for RV1103.
>
> Signed-off-by: Ye Zhang <[email protected]>
> Signed-off-by: Fabio Estevam <[email protected]>
> ---
> Changes since v1:
> - Use the original author from Rockchip's vendor U-Boot tree.
> - Use regmap_update_bits()
> - Removed unneeded blank lines.
> - Removed unneeded logging functions.
>
> drivers/pinctrl/rockchip/Makefile | 1 +
> drivers/pinctrl/rockchip/pinctrl-rv1103b.c | 398 +++++++++++++++++++++
> 2 files changed, 399 insertions(+)
> create mode 100644 drivers/pinctrl/rockchip/pinctrl-rv1103b.c
>
> diff --git a/drivers/pinctrl/rockchip/Makefile
> b/drivers/pinctrl/rockchip/Makefile
> index e17415e1ca68..2bbee66bd3ca 100644
> --- a/drivers/pinctrl/rockchip/Makefile
> +++ b/drivers/pinctrl/rockchip/Makefile
> @@ -18,5 +18,6 @@ obj-$(CONFIG_ROCKCHIP_RK3528) += pinctrl-rk3528.o
> obj-$(CONFIG_ROCKCHIP_RK3568) += pinctrl-rk3568.o
> obj-$(CONFIG_ROCKCHIP_RK3576) += pinctrl-rk3576.o
> obj-$(CONFIG_ROCKCHIP_RK3588) += pinctrl-rk3588.o
> +obj-$(CONFIG_ROCKCHIP_RV1103B) += pinctrl-rv1103b.o
> obj-$(CONFIG_ROCKCHIP_RV1108) += pinctrl-rv1108.o
> obj-$(CONFIG_ROCKCHIP_RV1126) += pinctrl-rv1126.o
> diff --git a/drivers/pinctrl/rockchip/pinctrl-rv1103b.c
> b/drivers/pinctrl/rockchip/pinctrl-rv1103b.c
> new file mode 100644
> index 000000000000..fb946b036661
> --- /dev/null
> +++ b/drivers/pinctrl/rockchip/pinctrl-rv1103b.c
> @@ -0,0 +1,398 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * (C) Copyright 2024 Rockchip Electronics Co., Ltd
> + */
> +
> +#include <dm.h>
> +#include <log.h>
> +#include <dm/pinctrl.h>
> +#include <regmap.h>
> +#include <syscon.h>
> +#include <linux/bitops.h>
> +
> +#include "pinctrl-rockchip.h"
> +
> +static int rv1103b_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
> +{
> + struct rockchip_pinctrl_priv *priv = bank->priv;
> + int iomux_num = (pin / 8);
> + struct regmap *regmap;
> + u32 data, rmask;
> + int reg, mask;
> + u8 bit;
> +
> + if (bank->bank_num == 2 && pin >= 12)
> + return 0;
> +
> + regmap = priv->regmap_base;
> + reg = bank->iomux[iomux_num].offset;
> + if ((pin % 8) >= 4)
> + reg += 0x4;
> + bit = (pin % 4) * 4;
> + mask = 0xf;
> +
> + if (bank->recalced_mask & BIT(pin))
> + rockchip_get_recalced_mux(bank, pin, ®, &bit, &mask);
> + data = (mask << (bit + 16));
> + rmask = data | (data >> 16);
> + data |= (mux & mask) << bit;
> +
> + return regmap_update_bits(regmap, reg, rmask, data);
This seem to have been updated to use regmap_update_bits(), thanks.
> +}
> +
> +#define RV1103_DRV_BITS_PER_PIN 8
> +#define RV1103_DRV_PINS_PER_REG 2
> +#define RV1103_DRV_GPIO0_A_OFFSET 0x40100
> +#define RV1103_DRV_GPIO0_B_OFFSET 0x50110
> +#define RV1103_DRV_GPIO1_A01_OFFSET 0x140
> +#define RV1103_DRV_GPIO1_A67_OFFSET 0x1014C
> +#define RV1103_DRV_GPIO2_OFFSET 0x30180
> +#define RV1103_DRV_GPIO2_SARADC_OFFSET 0x3080C
> +
> +static int rv1103b_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
> + int pin_num, struct regmap **regmap,
> + int *reg, u8 *bit)
> +{
> + struct rockchip_pinctrl_priv *priv = bank->priv;
> + int ret = 0;
> +
> + *regmap = priv->regmap_base;
> + switch (bank->bank_num) {
> + case 0:
> + if (pin_num < 7)
> + *reg = RV1103_DRV_GPIO0_A_OFFSET;
> + else if (pin_num > 7 && pin_num < 14)
> + *reg = RV1103_DRV_GPIO0_B_OFFSET - 0x10;
> + else
> + ret = -EINVAL;
> + break;
> +
> + case 1:
> + if (pin_num < 6)
> + *reg = RV1103_DRV_GPIO1_A01_OFFSET;
> + else if (pin_num >= 6 && pin_num < 23)
> + *reg = RV1103_DRV_GPIO1_A67_OFFSET - 0xc;
> + else if (pin_num >= 24 && pin_num < 30)
> + *reg = RV1103_DRV_GPIO1_A67_OFFSET - 0xc;
> + else
> + ret = -EINVAL;
> + break;
> +
> + case 2:
> + if (pin_num < 12) {
> + *reg = RV1103_DRV_GPIO2_OFFSET;
> + } else if (pin_num >= 16) {
> + ret = -EINVAL;
> + } else {
> + *reg = RV1103_DRV_GPIO2_SARADC_OFFSET;
> + *bit = 10;
> +
> + return 0;
> + }
> + break;
> +
> + default:
> + ret = -EINVAL;
> + break;
> + }
> +
> + if (ret) {
> + printf("unsupported bank_num %d pin_num %d\n", bank->bank_num,
> pin_num);
> + return ret;
> + }
> +
> + *reg += ((pin_num / RV1103_DRV_PINS_PER_REG) * 4);
> + *bit = pin_num % RV1103_DRV_PINS_PER_REG;
> + *bit *= RV1103_DRV_BITS_PER_PIN;
> +
> + return 0;
> +}
> +
> +static int rv1103b_set_drive(struct rockchip_pin_bank *bank,
> + int pin_num, int strength)
> +{
> + struct regmap *regmap;
> + int reg, ret, i;
> + u32 data;
> + u8 bit;
> + int rmask_bits = RV1103_DRV_BITS_PER_PIN;
> +
> + ret = rv1103b_calc_drv_reg_and_bit(bank, pin_num, ®map, ®, &bit);
> + if (ret)
> + return ret;
> +
> + for (i = 0, ret = 1; i < strength; i++)
> + ret = (ret << 1) | 1;
> +
> + if (bank->bank_num == 2 && pin_num >= 12) {
> + rmask_bits = 2;
> + ret = strength;
> + }
> +
> + /* Enable the write to the equivalent lower bits */
> + data = ((1 << rmask_bits) - 1) << (bit + 16);
> + data |= (ret << bit);
> + return regmap_write(regmap, reg, data);
However, this and all remaining places still use regmap_write, please
change all instances of regmap_write to use regmap_update_bits.
This ensure the pins configuration in DT cannot overflow the fields,
that is something that has happened in the past and is why I ensure all
new rk pinctrl drivers matches Linux kernel and use regmap_update_bits
instead of regmap_write.
Regards,
Jonas
> +}
[snip]
